公开(公告)号：US08993436B2

公开(公告)日：2015-03-31

申请号：US14199031

申请日：2014-03-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dong-Whan Ko ,  Jong-Sam Kim ,  Hong-Jae Shin ,  Seung-Il Bok ,  Sae-Il Son ,  Woo-Jin Jang

IPC: H01L21/475 ,  H01L21/768

CPC classification number: H01L21/76831 ,  H01L21/475 ,  H01L21/76811 ,  H01L21/76813 ,  H01L2221/1063

Abstract: A method for fabricating a semiconductor device includes sequentially forming an etch stop film and an insulating film on a substrate including a lower pattern forming a conductive mask pattern including a first opening on the insulating film, forming a via-hole in the insulating film using the conductive mask pattern as an etch mask, the via-hole exposing the etch stop film, removing the conductive mask pattern, and forming a passivation film along a side wall of the via-hole after removing the conductive mask pattern.

Abstract translation: 一种制造半导体器件的方法包括：在包括形成在绝缘膜上具有第一开口的导电掩模图案的下部图案的基板上依次形成蚀刻停止膜和绝缘膜，使用该绝缘膜在绝缘膜中形成通孔 导电掩模图案作为蚀刻掩模，通孔暴露蚀刻停止膜，去除导电掩模图案，以及在去除导电掩模图案之后沿通孔的侧壁形成钝化膜。

公开(公告)号：US09076886B2

公开(公告)日：2015-07-07

申请号：US13960323

申请日：2013-08-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dong-Il Park ,  Ae-Gyeong Kim ,  Jong-Sam Kim ,  Kyoung-Eun Uhm ,  Tae-Cheol Lee ,  Yong-Sang Jeong ,  Jin-Ha Jeong

IPC: H01L29/66 ,  H01L21/8234 ,  H01L29/423 ,  H01L29/40 ,  H01L29/78

CPC classification number: H01L21/823468 ,  H01L21/823456 ,  H01L21/823462 ,  H01L29/401 ,  H01L29/4236 ,  H01L29/7834

Abstract: A semiconductor device and a method for fabricating the same are provided. The semiconductor device includes a device isolation region, a trench formed in the device isolation region, a void connected to the trench in the device isolation region, a first mask pattern formed along sidewalls of the trench and protruding inwardly with respect to the void, a gate insulating film formed along the sidewall of the void, and a gate electrode filling the trench and at least a portion of the void.

Abstract translation: 提供了一种半导体器件及其制造方法。 半导体器件包括器件隔离区域，形成在器件隔离区域中的沟槽，连接到器件隔离区域中的沟槽的空穴，沿着沟槽的侧壁形成并相对于空隙向内突出的第一掩模图案， 沿着空隙的侧壁形成的栅极绝缘膜，以及填充沟槽和至少一部分空隙的栅电极。

公开(公告)号：US20140042528A1

公开(公告)日：2014-02-13

申请号：US13960323

申请日：2013-08-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dong-Il Park ,  Ae-Gyeong Kim ,  Jong-Sam Kim ,  Kyoung-Eun Uhm ,  Tae-Cheol Lee ,  Yong-Sang Jeong ,  Jin-Ha Jeong

IPC: H01L21/8234 ,  H01L29/40 ,  H01L29/423

CPC classification number: H01L21/823468 ,  H01L21/823456 ,  H01L21/823462 ,  H01L29/401 ,  H01L29/4236 ,  H01L29/7834

Abstract: A semiconductor device and a method for fabricating the same are provided. The semiconductor device includes a device isolation region, a trench formed in the device isolation region, a void connected to the trench in the device isolation region, a first mask pattern formed along sidewalls of the trench and protruding inwardly with respect to the void, a gate insulating film formed along the sidewall of the void, and a gate electrode filling the trench and at least a portion of the void.

Abstract translation: 提供了一种半导体器件及其制造方法。 半导体器件包括器件隔离区域，形成在器件隔离区域中的沟槽，连接到器件隔离区域中的沟槽的空穴，沿着沟槽的侧壁形成并相对于空隙向内突出的第一掩模图案， 沿着空隙的侧壁形成的栅极绝缘膜，以及填充沟槽和至少一部分空隙的栅电极。