SEMICONDUCTOR CHIP
    1.
    发明申请

    公开(公告)号:US20230057061A1

    公开(公告)日:2023-02-23

    申请号:US17722630

    申请日:2022-04-18

    Abstract: A semiconductor chip that includes a chip body that has a first side surface, a second side surface, a third side surface, and a fourth side surface; a central region at a central portion of the chip body; and a peripheral region at a peripheral portion of the chip body and adjacent to at least one of the first side surface to the fourth side surface, wherein the peripheral region includes a first unit region that includes a plurality of first bumps of a first bump density, and a second unit region that includes a plurality of second bumps of a second bump density higher than the first bump density.

    SUBSTRATE DEBONDING APPARATUS
    2.
    发明申请

    公开(公告)号:US20230052565A1

    公开(公告)日:2023-02-16

    申请号:US17718635

    申请日:2022-04-12

    Abstract: A substrate debonding apparatus includes a chuck attached to a second surface opposite to the first surface of the semiconductor substrate via a second adhesive layer. The chuck is configured to support a lower portion of a base film having a cross-sectional area in a horizontal direction greater than a cross-sectional area of the semiconductor substrate in the horizontal direction. The semiconductor debonding apparatus further includes a fixing ring arranged above the chuck and configured to fix in position an edge portion of the base film, and a cover ring arranged above the fixing ring and configured to adjust a diameter of an opening exposing the carrier substrate. The cover ring includes a guide frame arranged above the fixing ring, and a plurality of cover blades configured to move in a horizontal direction determined by the guide frame.

    SEMICONDUCTOR PACKAGE
    3.
    发明申请

    公开(公告)号:US20250120009A1

    公开(公告)日:2025-04-10

    申请号:US18825308

    申请日:2024-09-05

    Abstract: A semiconductor package includes a base substrate including a lower surface; a semiconductor chip on the base substrate; and a plurality of connection bumps on the lower surface of the base substrate, wherein the plurality of connection bumps includes a first group including connection bumps arranged on the lower surface in a first direction, and a second group including connection bumps arranged on the lower surface in a second direction, the second direction having a first angle with respect to the first direction, the connection bumps of the first group are offset from each other in the first direction, and the connection bumps of the second group are offset from each other in the second direction.

Patent Agency Ranking