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    Semiconductor packages
    2.
    发明授权
    Semiconductor packages 有权

    公开(公告)号：US11887841B2

    公开(公告)日：2024-01-30

    申请号：US17194575

    申请日：2021-03-08

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kyuha Lee ,  Joohee Jang ,  Seokho Kim ,  Hoonjoo Na ,  Jaehyung Park ,  Seongmin Son ,  Yikoan Hong

    IPC: H01L25/065 ,  H01L23/538

    CPC classification number: H01L25/0657 ,  H01L23/5385 ,  H01L23/5386

    Abstract: A semiconductor package includes a first semiconductor chip, a second semiconductor chip, first main connection pad structures, and first dummy connection pad structures. The first main connection pad structures are arranged at an interface between the first semiconductor chip and the second semiconductor chip and arranged to be apart from each other by a first main pitch in a first direction parallel to a top surface of the first semiconductor chip, wherein each of the first main connection pad structures includes a first connection pad electrically connected to the first semiconductor chip, and a second connection pad electrically connected to the second semiconductor chip and contacting the first connection pad. The first dummy connection pad structures are arranged at an interface between the first semiconductor chip and the second semiconductor chip, are arranged to be apart from the first main connection pad structures, and are arranged to be apart from each other by a first dummy pitch in the first direction, the first dummy pitch being greater than the first main pitch.

    Semiconductor device and method of manufacturing the same
    3.
    发明授权
    Semiconductor device and method of manufacturing the same 有权

    公开(公告)号：US12142588B2

    公开(公告)日：2024-11-12

    申请号：US18126205

    申请日：2023-03-24

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Joohee Jang ,  Seokho Kim ,  Hoonjoo Na ,  Jaehyung Park ,  Kyuha Lee

    IPC: H01L27/146 ,  H01L23/00

    Abstract: A method includes forming a first substrate including a first dielectric layer and a first metal pad, forming a second substrate including a second dielectric layer and a second metal pad, and bonding the first dielectric layer to the second dielectric layer, and the first metal pad to the second metal pad. One or both of the first and second substrates is formed by forming a first insulating layer, forming an opening in the layer, forming a barrier on an inner surface of the opening, forming a metal pad material on the barrier, polishing the metal pad material to expose a portion of the barrier and to form a gap, expanding the gap, forming a second insulating layer to fill the opening and the gap, and polishing the insulating layers such that a top surface of the metal pad is substantially planar with an upper surface of the polished layer.

    Semiconductor device and method of manufacturing the same
    6.
    发明授权
    Semiconductor device and method of manufacturing the same 有权

    公开(公告)号：US11616036B2

    公开(公告)日：2023-03-28

    申请号：US17694035

    申请日：2022-03-14

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Joohee Jang ,  Seokho Kim ,  Hoonjoo Na ,  Jaehyung Park ,  Kyuha Lee

    IPC: H01L27/146 ,  H01L23/00

    Abstract: A method includes forming a first substrate including a first dielectric layer and a first metal pad, forming a second substrate including a second dielectric layer and a second metal pad, and bonding the first dielectric layer to the second dielectric layer, and the first metal pad to the second metal pad. One or both of the first and second substrates is formed by forming a first insulating layer, forming an opening in the layer, forming a barrier on an inner surface of the opening, forming a metal pad material on the barrier, polishing the metal pad material to expose a portion of the barrier and to form a gap, expanding the gap, forming a second insulating layer to fill the opening and the gap, and polishing the insulating layers such that a top surface of the metal pad is substantially planar with an upper surface of the polished layer.

    SEMICONDUCTOR DEVICES
    8.
    发明申请
    SEMICONDUCTOR DEVICES 有权

    公开(公告)号：US20210057371A1

    公开(公告)日：2021-02-25

    申请号：US16854114

    申请日：2020-04-21

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jaehyung Park ,  Seokho Kim ,  Hoonjoo Na ,  Kwangjin Moon ,  Kyuha Lee ,  Joohee Jang

    IPC: H01L23/00 ,  H01L27/30 ,  H01L27/28

    Abstract: A semiconductor device includes a first adsorption layer, a first bonding layer, a second bonding layer, and a second adsorption layer stacked on a first substrate, and a conductive pattern structure penetrating through the first adsorption layer, the first bonding layer, the second bonding layer and the second adsorption layer. The first and second bonding layers are in contact with each other, and each of the first and second adsorption layers includes a low-K dielectric material.

    Semiconductor device and method of manufacturing the same
    10.
    发明授权
    Semiconductor device and method of manufacturing the same 有权

    公开(公告)号：US11296045B2

    公开(公告)日：2022-04-05

    申请号：US16831331

    申请日：2020-03-26

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Joohee Jang ,  Seokho Kim ,  Hoonjoo Na ,  Jaehyung Park ,  Kyuha Lee

    IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/00 ,  H01L27/146

    Abstract: A semiconductor device is provided and includes first and second semiconductor chips bonded together. The first chip includes a first substrate, a first insulating layer disposed on the first substrate and having a top surface, a first metal pad embedded in the first insulating layer and having a top surface substantially planar with the top surface of the first insulating layer, and a first barrier disposed between the first insulating layer and the first metal pad. The second chip includes a second substrate, a second insulating layer, a second metal pad, and a second barrier with a similar configuration to the first chip. The top surfaces of the first and second insulating layers are bonded to provide a bonding interface, the first and second metal pads are connected, and a portion of the first insulating layer is in contact with a side region of the first metal pad.

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