中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

24 records (took 0.028 seconds)

    SEMICONDUCTOR DEVICE
    1.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20210375722A1

    公开(公告)日：2021-12-02

    申请号：US17147927

    申请日：2021-01-13

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jinnam Kim ,  Seokho Kim ,  Hoonjoo Na ,  Kwangjin Moon

    IPC: H01L23/48 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78

    Abstract: A semiconductor device includes a substrate having a first surface on which an active region is disposed, and a second surface opposite the first surface, a buried conductive line extending in one direction and having a portion buried in the active region, an insulating portion covering the buried conductive line, a contact structure disposed on the insulating portion and connected to the buried conductive line, a through-hole extending from the second surface to the insulating portion and exposing the buried portion of the buried conductive line, an insulating isolation film disposed on a side surface of the buried conductive line and exposing a bottom surface of the buried portion and a side surface adjacent to the bottom surface, a through-via contacting the bottom surface and the adjacent side surface of the buried conductive line, an insulating liner surrounding the through-via.

    Semiconductor packages
    4.
    发明授权
    Semiconductor packages 有权

    公开(公告)号：US11887841B2

    公开(公告)日：2024-01-30

    申请号：US17194575

    申请日：2021-03-08

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kyuha Lee ,  Joohee Jang ,  Seokho Kim ,  Hoonjoo Na ,  Jaehyung Park ,  Seongmin Son ,  Yikoan Hong

    IPC: H01L25/065 ,  H01L23/538

    CPC classification number: H01L25/0657 ,  H01L23/5385 ,  H01L23/5386

    Abstract: A semiconductor package includes a first semiconductor chip, a second semiconductor chip, first main connection pad structures, and first dummy connection pad structures. The first main connection pad structures are arranged at an interface between the first semiconductor chip and the second semiconductor chip and arranged to be apart from each other by a first main pitch in a first direction parallel to a top surface of the first semiconductor chip, wherein each of the first main connection pad structures includes a first connection pad electrically connected to the first semiconductor chip, and a second connection pad electrically connected to the second semiconductor chip and contacting the first connection pad. The first dummy connection pad structures are arranged at an interface between the first semiconductor chip and the second semiconductor chip, are arranged to be apart from the first main connection pad structures, and are arranged to be apart from each other by a first dummy pitch in the first direction, the first dummy pitch being greater than the first main pitch.

    Semiconductor device
    5.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US11380607B2

    公开(公告)日：2022-07-05

    申请号：US17147927

    申请日：2021-01-13

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jinnam Kim ,  Seokho Kim ,  Hoonjoo Na ,  Kwangjin Moon

    IPC: H01L23/48 ,  H01L29/06 ,  H01L29/78 ,  H01L29/66

    Abstract: A semiconductor device includes a substrate having a first surface on which an active region is disposed, and a second surface opposite the first surface, a buried conductive line extending in one direction and having a portion buried in the active region, an insulating portion covering the buried conductive line, a contact structure disposed on the insulating portion and connected to the buried conductive line, a through-hole extending from the second surface to the insulating portion and exposing the buried portion of the buried conductive line, an insulating isolation film disposed on a side surface of the buried conductive line and exposing a bottom surface of the buried portion and a side surface adjacent to the bottom surface, a through-via contacting the bottom surface and the adjacent side surface of the buried conductive line, an insulating liner surrounding the through-via.

    Semiconductor device
    7.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US11749587B2

    公开(公告)日：2023-09-05

    申请号：US17855902

    申请日：2022-07-01

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jinnam Kim ,  Seokho Kim ,  Hoonjoo Na ,  Kwangjin Moon

    IPC: H01L23/48 ,  H01L29/06 ,  H01L29/78 ,  H01L29/66

    CPC classification number: H01L23/481 ,  H01L29/0649 ,  H01L29/0665 ,  H01L29/66795 ,  H01L29/785

    Abstract: A semiconductor device includes a substrate having a first surface on which an active region is disposed, and a second surface opposite the first surface, a buried conductive line extending in one direction and having a portion buried in the active region, an insulating portion covering the buried conductive line, a contact structure disposed on the insulating portion and connected to the buried conductive line, a through-hole extending from the second surface to the insulating portion and exposing the buried portion of the buried conductive line, an insulating isolation film disposed on a side surface of the buried conductive line and exposing a bottom surface of the buried portion and a side surface adjacent to the bottom surface, a through-via contacting the bottom surface and the adjacent side surface of the buried conductive line, an insulating liner surrounding the through-via.

    Semiconductor device and method of manufacturing the same
    8.
    发明授权
    Semiconductor device and method of manufacturing the same 有权

    公开(公告)号：US11616036B2

    公开(公告)日：2023-03-28

    申请号：US17694035

    申请日：2022-03-14

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Joohee Jang ,  Seokho Kim ,  Hoonjoo Na ,  Jaehyung Park ,  Kyuha Lee

    IPC: H01L27/146 ,  H01L23/00

    Abstract: A method includes forming a first substrate including a first dielectric layer and a first metal pad, forming a second substrate including a second dielectric layer and a second metal pad, and bonding the first dielectric layer to the second dielectric layer, and the first metal pad to the second metal pad. One or both of the first and second substrates is formed by forming a first insulating layer, forming an opening in the layer, forming a barrier on an inner surface of the opening, forming a metal pad material on the barrier, polishing the metal pad material to expose a portion of the barrier and to form a gap, expanding the gap, forming a second insulating layer to fill the opening and the gap, and polishing the insulating layers such that a top surface of the metal pad is substantially planar with an upper surface of the polished layer.

    SEMICONDUCTOR PACKAGE FOR IMPROVING BONDING RELIABILITY
    10.
    发明申请
    SEMICONDUCTOR PACKAGE FOR IMPROVING BONDING RELIABILITY 有权

    公开(公告)号：US20220037273A1

    公开(公告)日：2022-02-03

    申请号：US17206337

    申请日：2021-03-19

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jaehyung Park ,  Seokho Kim ,  Hoonjoo Na ,  Seongmin Son ,  Kyuha Lee ,  Yikoan Hong

    IPC: H01L23/00 ,  H01L25/065 ,  H01L25/18

    Abstract: A semiconductor package includes main pad structures and dummy pad structures between a first semiconductor chip and a second semiconductor chip. The main pad structures include first main pad structures apart from one another on the first semiconductor chip and second main pad structures placed apart from one another on the second semiconductor chip and bonded to the first main pad structures. The dummy pad structures include first dummy pad structures including first dummy pads apart from one another on the first semiconductor chip and first dummy capping layers on the first dummy pads, and second dummy pad structures including second dummy pads apart from one another on the second semiconductor chip and second dummy capping layers on the second dummy pads. The first dummy capping layers of the first dummy pad structures are not bonded to the second dummy capping layers of the second dummy pad structures.

Patent Agency Ranking