公开(公告)号：US11054462B2

公开(公告)日：2021-07-06

申请号：US15791738

申请日：2017-10-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Joon Woo Cho ,  Yun Ju Kwon ,  Sang Woo Kim

IPC: G01R31/28 ,  G06F1/3206 ,  G06F1/3209 ,  G06F1/3296 ,  G06F1/26

Abstract: A semiconductor device and a method of testing the same are provided. A semiconductor device includes a Design Under Test (DUT), a processing core configured to execute test software to determine an optimum operating voltage of the DUT, and a protection circuit configured to block the transmission of undefined signals generated by the DUT while the processing core executes the test software.

公开(公告)号：US11714122B2

公开(公告)日：2023-08-01

申请号：US17338868

申请日：2021-06-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Joon Woo Cho ,  Yun Ju Kwon ,  Sang Woo Kim

IPC: G06F1/32 ,  G01R31/28 ,  G06F1/3206 ,  G06F1/3209 ,  G06F1/3296 ,  G06F1/26

CPC classification number: G01R31/2853 ,  G06F1/26 ,  G06F1/3206 ,  G06F1/3209 ,  G06F1/3296 ,  G01R31/2884

Abstract: A semiconductor device and a method of testing the same are provided. A semiconductor device includes a Design Under Test (DUT), a processing core configured to execute test software to determine an optimum operating voltage of the DUT, and a protection circuit configured to block the transmission of undefined signals generated by the DUT while the processing core executes the test software.