公开(公告)号：US20180308725A1

公开(公告)日：2018-10-25

申请号：US15795746

申请日：2017-10-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joong-han SHIN ,  Supakit CHARNVANICHBORIKARN ,  Bong-jin KUH ,  Ki-chul KIM ,  Jae-hee LEE

IPC: H01L21/67 ,  C30B28/08

CPC classification number: H01L21/67115 ,  C30B28/08

Abstract: A laser annealing apparatus includes a laser oscillating structure, an oscillator, a beam expanding telescope, a first power meter, and a second power meter. The laser oscillating structure emits a first laser beam of a first wavelength and first beam cross-section to a substrate in a chamber including an optical window. The oscillator emits a second laser beam, of a second wavelength different from the first wavelength, to the substrate. The beam expanding telescope is on an optical path for the second laser beam and expands the second laser beam to a second beam cross-section. The first and second power meters measure energy of the second laser beam and a third laser beam, generated as the second laser beam is reflected by the substrate. The first beam cross-section and the second beam cross-section may be equal.

公开(公告)号：US20140256117A1

公开(公告)日：2014-09-11

申请号：US14133944

申请日：2013-12-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Joong-han SHIN ,  Bong-jin KUH ,  Ki-chul KIM ,  Jeong-meung KIM ,  Eun-ha LEE ,  Jong-sung LIM ,  Han-mei CHOI

IPC: H01L21/02

CPC classification number: H01L21/02381 ,  H01L21/02532 ,  H01L21/02667

Abstract: A method of forming an epitaxial layer includes forming a plurality of first insulation patterns in a substrate, the plurality of first insulation patterns spaced apart from each other, forming first epitaxial patterns on the plurality of first insulation patterns, forming second insulation patterns between the plurality of first insulation patterns to contact the plurality of first insulation patterns, and forming second epitaxial patterns on the second insulation patterns and between the first epitaxial patterns to contact the first epitaxial patterns, the first epitaxial patterns and the second epitaxial patterns forming a single epitaxial layer.

Abstract translation: 形成外延层的方法包括在基板中形成多个第一绝缘图案，多个第一绝缘图案彼此间隔开，在多个第一绝缘图案上形成第一外延图案，在多个第一绝缘图案之间形成第二绝缘图案 的第一绝缘图案以接触所述多个第一绝缘图案，以及在所述第二绝缘图案上和所述第一外延图案之间以及所述第一外延图案之间形成第二外延图案以接触所述第一外延图案，所述第一外延图案和所述第二外延图案形成单个外延层 。

公开(公告)号：US20160300847A1

公开(公告)日：2016-10-13

申请号：US15185020

申请日：2016-06-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Wanit MANOROTKUL ,  Joong-han SHIN ,  Bong-jin KUH ,  Han-mei CHOI ,  Dmitry MIKULIK

IPC: H01L27/115 ,  H01L21/3205 ,  H01L21/02 ,  H01L23/528

CPC classification number: H01L27/11575 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/02675 ,  H01L21/32055 ,  H01L23/528 ,  H01L27/11519 ,  H01L27/11526 ,  H01L27/11548 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/11573 ,  H01L27/11582

Abstract: An IC device includes a polycrystalline silicon thin film interposed between a first level semiconductor circuit and a second level semiconductor circuit which are formed on a substrate and disposed to vertically overlap each other. The polycrystalline silicon thin film includes at least one silicon single crystal. The at least one silicon single crystal includes a flat horizontal portion, which provides an active region of the second level semiconductor device, and a pin-shaped protruding portion protruding from the flat horizontal portion toward the first level semiconductor device.