公开(公告)号：US20250118670A1

公开(公告)日：2025-04-10

申请号：US18634162

申请日：2024-04-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jun Sung KIM ,  Kyeong Beom PARK ,  Su Hyun BARK ,  Jong Min BAEK ,  Jun Hyuk LIM

IPC: H01L23/528 ,  H01L23/522

Abstract: Provided is a semiconductor device and method of manufacturing same, the semiconductor device including: a substrate; an interlayer insulating layer on the substrate; an upper wiring trench in the interlayer insulating layer; an upper wiring layer including an upper wiring barrier layer along a sidewall of the upper wiring trench and a bottom surface of the upper wiring trench, and an upper wiring filling layer on the upper wiring barrier layer, wherein the upper wiring filling layer fills an inside of the upper wiring trench; and a first etching stop layer on each of an upper surface of the interlayer insulating layer and an upper surface of the upper wiring layer, the first etching stop layer including: a first portion in contact with an upper surface of the upper wiring filling layer; a second portion in contact with an upper surface of the upper wiring barrier layer; and a third portion in contact with the upper surface of the interlayer insulating layer, wherein a percentage of nitrogen (N) in the first portion is greater than a percentage of nitrogen (N) in the second portion.

公开(公告)号：US20230411498A1

公开(公告)日：2023-12-21

申请号：US18175821

申请日：2023-02-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyu-Hee HAN ,  Bong Kwan BAEK ,  Sang Shin JANG ,  Koung Min RYU ,  Jong Min BAEK ,  Jung Hoo SHIN ,  Jun Hyuk LIM ,  Jung Hwan CHUN

IPC: H01L29/66 ,  H01L21/8234

CPC classification number: H01L29/66795 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823475

Abstract: A method for fabricating semiconductor device may include forming a source/drain pattern on a fin-type pattern, forming an etch stop film and an interlayer insulating film on the source/drain pattern, forming a contact hole in the interlayer insulating film, forming a sacrificial liner along a sidewall and a bottom surface of the contact hole, performing an ion implantation process while the sacrificial liner is present, removing the sacrificial liner and forming a contact liner along the sidewall of the contact hole, and forming a source/drain contact on the contact liner. The ion implantation process may include implant impurities into the source/drain pattern. The source/drain contact may be connected to the source/drain pattern.

公开(公告)号：US20230268276A1

公开(公告)日：2023-08-24

申请号：US18061642

申请日：2022-12-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Hoon AHN ,  Kyung Seok OH ,  Seung-Heon LEE ,  Jun Hyuk LIM

IPC: H01L23/532 ,  H01L21/768 ,  H01L23/522

CPC classification number: H01L23/53295 ,  H01L21/76877 ,  H01L23/53223 ,  H01L23/5226 ,  H01L21/76826 ,  H01L21/7682 ,  H01L2221/1047

Abstract: There is provided a semiconductor device capable of improving the performance and reliability of a device. The semiconductor device may include a first interlayer insulating film containing therein a plurality of pores, a first line structure in the first interlayer insulating film, an inserted insulating film extending along and on a upper surface of the first interlayer insulating film and in contact with the first interlayer insulating film, a barrier insulating film in contact with the inserted insulating film and extending along an upper surface of the inserted insulating film and an upper surface of the first line structure, a second interlayer insulating film on the barrier insulating film and a second line structure disposed in the second interlayer insulating film and connected to the first line structure.

公开(公告)号：US20220392841A1

公开(公告)日：2022-12-08

申请号：US17671088

申请日：2022-02-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung Jin KANG ,  Jong Min BAEK ,  Deok Young JUNG ,  Jun Hyuk LIM

IPC: H01L23/535 ,  H01L23/528 ,  H01L21/768

Abstract: A semiconductor device includes an etching stop film disposed on a substrate; an interlayer insulating film on the etching stop film; a first trench and a second trench which are spaced apart in a first direction, and penetrate the etching stop film and the interlayer insulating film, the first trench having a side wall that exposes the interlayer insulating film, and the second trench having a side wall that exposes the interlayer insulating film; a first spacer which covers the interlayer insulating film exposed by the side wall of the first trench and does not cover a portion of the side wall of the first trench; a second spacer which covers the interlayer insulating film exposed by the side wall of the second trench and does not cover a portion of the side wall of the second trench; a first barrier layer which extends along a side wall of the first spacer, the portion of the side wall of the first trench not covered by the first spacer, and a bottom surface of the first trench; a first filling film which fills the first trench, on the first barrier layer; a second barrier layer which extends along a side wall of the second spacer, the portion of the side wall of the second trench not covered by the second spacer, and a bottom surface of the second trench; and a second filling film which fills the second trench on the second barrier layer. I In the first direction, a width of the first trench and a width of the second trench are different from each other, and at a first height from a bottom surface of the substrate, a thickness of the first spacer on the side wall of the first trench is different from a thickness of the second spacer on the side wall of the second trench.

公开(公告)号：US20220392800A1

公开(公告)日：2022-12-08

申请号：US17739114

申请日：2022-05-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jun Hyuk LIM ,  Jong Min BAEK ,  Deok Young JUNG ,  Sung Jin KANG ,  Jang Ho LEE

IPC: H01L21/768 ,  H01L23/522 ,  H01L21/8234

Abstract: There is provided a semiconductor device including an etching stop film which is placed disposed on a substrate; an interlayer insulating film which is disposed on the etching stop film; a trench which penetrates the interlayer insulating film and the etching stop film; a spacer which extends along side walls of the trench; a barrier film which extends along the spacer and a bottom surface of the trench; and a filling film which fills the trench on the barrier film. The trench includes a first trench and a second trench which are spaced apart from each other in a first direction and have different widths from each other in the first direction. A bottom surface of the second trench is placed disposed below a bottom surface of the first trench.