公开(公告)号：US20220285207A1

公开(公告)日：2022-09-08

申请号：US17826366

申请日：2022-05-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung Jin KANG ,  Jong Min BAEK ,  Woo Kyung YOU ,  Kyu-Hee HAN ,  Han Seong KIM ,  Jang Ho LEE ,  Sang Shin JANG

IPC: H01L21/768 ,  H01L23/48

Abstract: A semiconductor device including a first interlayer insulating film; a conductive pattern in the first interlayer insulating film; a resistance pattern on the conductive pattern; an upper etching stopper film spaced apart from the resistance pattern, extending in parallel with a top surface of the resistance pattern, and including a first metal; a lower etching stopper film on the conductive pattern, extending in parallel with a top surface of the first interlayer insulating film, and including a second metal; and a second interlayer insulating film on the upper etching stopper film and the lower etching stopper film, wherein a distance from a top surface of the second interlayer insulating film to a top surface of the upper etching stopper film is smaller than a distance from the top surface of the second interlayer insulating film to a top surface of the lower etching stopper film.

公开(公告)号：US20220392841A1

公开(公告)日：2022-12-08

申请号：US17671088

申请日：2022-02-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung Jin KANG ,  Jong Min BAEK ,  Deok Young JUNG ,  Jun Hyuk LIM

IPC: H01L23/535 ,  H01L23/528 ,  H01L21/768

Abstract: A semiconductor device includes an etching stop film disposed on a substrate; an interlayer insulating film on the etching stop film; a first trench and a second trench which are spaced apart in a first direction, and penetrate the etching stop film and the interlayer insulating film, the first trench having a side wall that exposes the interlayer insulating film, and the second trench having a side wall that exposes the interlayer insulating film; a first spacer which covers the interlayer insulating film exposed by the side wall of the first trench and does not cover a portion of the side wall of the first trench; a second spacer which covers the interlayer insulating film exposed by the side wall of the second trench and does not cover a portion of the side wall of the second trench; a first barrier layer which extends along a side wall of the first spacer, the portion of the side wall of the first trench not covered by the first spacer, and a bottom surface of the first trench; a first filling film which fills the first trench, on the first barrier layer; a second barrier layer which extends along a side wall of the second spacer, the portion of the side wall of the second trench not covered by the second spacer, and a bottom surface of the second trench; and a second filling film which fills the second trench on the second barrier layer. I In the first direction, a width of the first trench and a width of the second trench are different from each other, and at a first height from a bottom surface of the substrate, a thickness of the first spacer on the side wall of the first trench is different from a thickness of the second spacer on the side wall of the second trench.

公开(公告)号：US20220392800A1

公开(公告)日：2022-12-08

申请号：US17739114

申请日：2022-05-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jun Hyuk LIM ,  Jong Min BAEK ,  Deok Young JUNG ,  Sung Jin KANG ,  Jang Ho LEE

IPC: H01L21/768 ,  H01L23/522 ,  H01L21/8234

Abstract: There is provided a semiconductor device including an etching stop film which is placed disposed on a substrate; an interlayer insulating film which is disposed on the etching stop film; a trench which penetrates the interlayer insulating film and the etching stop film; a spacer which extends along side walls of the trench; a barrier film which extends along the spacer and a bottom surface of the trench; and a filling film which fills the trench on the barrier film. The trench includes a first trench and a second trench which are spaced apart from each other in a first direction and have different widths from each other in the first direction. A bottom surface of the second trench is placed disposed below a bottom surface of the first trench.

公开(公告)号：US20240112949A1

公开(公告)日：2024-04-04

申请号：US18537896

申请日：2023-12-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung Jin KANG ,  Jong Min BAEK ,  Woo Kyung YOU ,  Kyu-Hee HAN ,  Han Seong KIM ,  Jang Ho LEE ,  Sang Shin JANG

IPC: H01L21/768 ,  H01L23/48

CPC classification number: H01L21/76808 ,  H01L23/481 ,  H01L21/76832

Abstract: A semiconductor device including a first interlayer insulating film; a conductive pattern in the first interlayer insulating film; a resistance pattern on the conductive pattern; an upper etching stopper film spaced apart from the resistance pattern, extending in parallel with a top surface of the resistance pattern, and including a first metal; a lower etching stopper film on the conductive pattern, extending in parallel with a top surface of the first interlayer insulating film, and including a second metal; and a second interlayer insulating film on the upper etching stopper film and the lower etching stopper film, wherein a distance from a top surface of the second interlayer insulating film to a top surface of the upper etching stopper film is smaller than a distance from the top surface of the second interlayer insulating film to a top surface of the lower etching stopper film.

公开(公告)号：US20210020497A1

公开(公告)日：2021-01-21

申请号：US16798789

申请日：2020-02-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung Jin KANG ,  Jong Min BAEK ,  Woo Kyung YOU ,  Kyu-Hee HAN ,  Han Seong KIM ,  Jang Ho LEE ,  Sang Shin JANG

IPC: H01L21/768 ,  H01L23/48

Abstract: A semiconductor device including a first interlayer insulating film; a conductive pattern in the first interlayer insulating film; a resistance pattern on the conductive pattern; an upper etching stopper film spaced apart from the resistance pattern, extending in parallel with a top surface of the resistance pattern, and including a first metal; a lower etching stopper film on the conductive pattern, extending in parallel with a top surface of the first interlayer insulating film, and including a second metal; and a second interlayer insulating film on the upper etching stopper film and the lower etching stopper film, wherein a distance from a top surface of the second interlayer insulating film to a top surface of the upper etching stopper film is smaller than a distance from the top surface of the second interlayer insulating film to a top surface of the lower etching stopper film.