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公开(公告)号:US20240234250A9
公开(公告)日:2024-07-11
申请号:US18320423
申请日:2023-05-19
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sangkoo KANG , Wookyung YOU , Minjae KANG , Koungmin RYU , Hoonseok SEO , Woojin LEE , Junchae LEE
IPC: H01L23/48 , H01L21/762 , H01L21/768 , H01L27/088
CPC classification number: H01L23/481 , H01L21/76224 , H01L21/76898 , H01L27/088 , H01L29/66439
Abstract: An integrated circuit (IC) device includes a substrate, a pair of fin-type active regions protruding from the substrate to define a trench region on the substrate, the fin-type active regions extending in a first lateral direction, a pair of source/drain regions on the fin-type active regions, respectively, a device isolation film in the trench region, the device isolation film apart from the substrate in a vertical direction, an etch stop structure filling at least a portion of the trench region between the substrate and the device isolation film, a via power rail between the pair of fin-type active regions and between the pair of source/drain regions, the via power rail passing through at least a portion of the etch stop structure, and a backside power rail passing through the substrate, the backside power rail in contact with one end of the via power rail.
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公开(公告)号:US20240136254A1
公开(公告)日:2024-04-25
申请号:US18320423
申请日:2023-05-18
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sangkoo KANG , Wookyung YOU , Minjae KANG , Koungmin RYU , Hoonseok SEO , Woojin LEE , Junchae LEE
IPC: H01L23/48 , H01L21/762 , H01L21/768 , H01L27/088
CPC classification number: H01L23/481 , H01L21/76224 , H01L21/76898 , H01L27/088 , H01L29/66439
Abstract: An integrated circuit (IC) device includes a substrate, a pair of fin-type active regions protruding from the substrate to define a trench region on the substrate, the fin-type active regions extending in a first lateral direction, a pair of source/drain regions on the fin-type active regions, respectively, a device isolation film in the trench region, the device isolation film apart from the substrate in a vertical direction, an etch stop structure filling at least a portion of the trench region between the substrate and the device isolation film, a via power rail between the pair of fin-type active regions and between the pair of source/drain regions, the via power rail passing through at least a portion of the etch stop structure, and a backside power rail passing through the substrate, the backside power rail in contact with one end of the via power rail.
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