公开(公告)号：US20240234250A9

公开(公告)日：2024-07-11

申请号：US18320423

申请日：2023-05-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangkoo KANG ,  Wookyung YOU ,  Minjae KANG ,  Koungmin RYU ,  Hoonseok SEO ,  Woojin LEE ,  Junchae LEE

IPC: H01L23/48 ,  H01L21/762 ,  H01L21/768 ,  H01L27/088

CPC classification number: H01L23/481 ,  H01L21/76224 ,  H01L21/76898 ,  H01L27/088 ,  H01L29/66439

Abstract: An integrated circuit (IC) device includes a substrate, a pair of fin-type active regions protruding from the substrate to define a trench region on the substrate, the fin-type active regions extending in a first lateral direction, a pair of source/drain regions on the fin-type active regions, respectively, a device isolation film in the trench region, the device isolation film apart from the substrate in a vertical direction, an etch stop structure filling at least a portion of the trench region between the substrate and the device isolation film, a via power rail between the pair of fin-type active regions and between the pair of source/drain regions, the via power rail passing through at least a portion of the etch stop structure, and a backside power rail passing through the substrate, the backside power rail in contact with one end of the via power rail.

公开(公告)号：US20240234253A1

公开(公告)日：2024-07-11

申请号：US18399173

申请日：2023-12-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Wookyung YOU ,  Yeonggil KIM ,  Sangkoo KANG ,  Minjae KANG ,  Koungmin RYU ,  Hoonseok SEO ,  Woojin LEE

IPC: H01L23/48 ,  H01L23/00 ,  H01L25/065 ,  H01L27/088 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L23/481 ,  H01L24/05 ,  H01L25/0657 ,  H01L27/088 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/775 ,  H01L29/78696 ,  H01L2224/0557 ,  H01L2225/06541 ,  H01L2924/13091

Abstract: A semiconductor device includes: a device structure including a first semiconductor substrate and having an active pattern extending in first direction, a conductive through-via electrically connected to a front wiring layer and penetrating through the first semiconductor substrate, wherein the first semiconductor substrate has a non-planarized lower surface in which a peripheral region around the conductive through-via curves downward, a first bonding structure having a planarized insulating layer disposed on the second surface of the first semiconductor substrate and having a planarized upper surface.

公开(公告)号：US20230036104A1

公开(公告)日：2023-02-02

申请号：US17712319

申请日：2022-04-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Bongkwan BAEK ,  Junghwan CHUN ,  Jongmin BAEK ,  Koungmin RYU

IPC: H01L29/417 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786

Abstract: A semiconductor device includes a gate structure disposed on a substrate; a source and drain layer disposed on the substrate adjacent the gate structure; a first contact plug disposed on the source and drain layer; an insulation pattern structure disposed on the first contact plug, the insulation pattern structure including insulation patterns having different carbon concentrations; and a second contact plug disposed on the gate structure.

公开(公告)号：US20240136254A1

公开(公告)日：2024-04-25

申请号：US18320423

申请日：2023-05-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangkoo KANG ,  Wookyung YOU ,  Minjae KANG ,  Koungmin RYU ,  Hoonseok SEO ,  Woojin LEE ,  Junchae LEE

IPC: H01L23/48 ,  H01L21/762 ,  H01L21/768 ,  H01L27/088

CPC classification number: H01L23/481 ,  H01L21/76224 ,  H01L21/76898 ,  H01L27/088 ,  H01L29/66439

Abstract: An integrated circuit (IC) device includes a substrate, a pair of fin-type active regions protruding from the substrate to define a trench region on the substrate, the fin-type active regions extending in a first lateral direction, a pair of source/drain regions on the fin-type active regions, respectively, a device isolation film in the trench region, the device isolation film apart from the substrate in a vertical direction, an etch stop structure filling at least a portion of the trench region between the substrate and the device isolation film, a via power rail between the pair of fin-type active regions and between the pair of source/drain regions, the via power rail passing through at least a portion of the etch stop structure, and a backside power rail passing through the substrate, the backside power rail in contact with one end of the via power rail.

公开(公告)号：US20230059177A1

公开(公告)日：2023-02-23

申请号：US17720571

申请日：2022-04-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangshin JANG ,  Wookyung YOU ,  Sangkoo KANG ,  Donghyun ROH ,  Koungmin RYU ,  Jongmin BAEK

IPC: H01L23/528 ,  H01L23/532

Abstract: A semiconductor device including a first conductive layer on a substrate, a second conductive layer on the first conductive layer, a contact structure between the first and second conductive layers, and a barrier structure surrounding a lower region of a side surface of the second conductive layer, wherein the contact structure includes a contact conductive layer having a first upper surface portion and a second upper surface extending from the first upper surface portion and being concave, and a gap-fill pattern fills a space between the second upper surface portion and the second conductive layer and includes a first gap-fill insulating layer including a metal element and a second gap-fill insulating layer including a silicon element, and the barrier structure includes a first etch stop layer and a barrier layer that include same materials as the first insulating material and the second insulating material, respectively, may be provided.

公开(公告)号：US20180204762A1

公开(公告)日：2018-07-19

申请号：US15828728

申请日：2017-12-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sunki MIN ,  Songe KIM ,  Koungmin RYU ,  Je-Min YOO

IPC: H01L21/762 ,  H01L27/092 ,  H01L29/06 ,  H01L21/8238

CPC classification number: H01L21/76229 ,  H01L21/823821 ,  H01L21/82385 ,  H01L21/823878 ,  H01L27/092 ,  H01L27/0924 ,  H01L29/0649 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/7848 ,  H01L29/78696

Abstract: A semiconductor device includes a substrate having a first active pattern and a second active pattern, the first active pattern including a first recess region dividing an upper portion thereof into a first portion and a second portion, the second active pattern including a second recess region dividing an upper portion thereof into a first portion and a second portion, a first insulating pattern covering an inner sidewall of the first recess region, and a second insulating pattern covering an inner sidewall of the second recess region. The first insulating pattern and the second insulating pattern include the same insulating material, and a volume fraction of the first insulating pattern with respect to a volume of the first recess region is smaller than a volume fraction of the second insulating pattern with respect to a volume of the second recess region.