公开(公告)号：US09128618B2

公开(公告)日：2015-09-08

申请号：US14569143

申请日：2014-12-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Change-hee Lee ,  Jung-Been Im ,  Jung-Yeon Yoon ,  Young-Goo Ko ,  Dong-Hyun Song

IPC: G06F12/02 ,  G06F3/06 ,  G06F13/24 ,  G11C16/10

CPC classification number: G06F3/061 ,  G06F3/065 ,  G06F3/0688 ,  G06F12/0246 ,  G06F13/24 ,  G06F2212/7207 ,  G11C16/102 ,  G11C2216/20

Abstract: A non-volatile memory controller, system and method capable of processing a next request as an interrupt before completing a current operation are disclosed. The non-volatile memory system includes a first memory storing meta data loaded from a flash memory; a second memory storing the meta data copied from the first memory; and a flash memory controller copying the meta data from the first memory to the second memory, changing the meta data in the second memory, and then re-copying the changed meta data from the second memory to the first memory during a first-type operation that requires changes in the meta data.

Abstract translation: 公开了一种在完成当前操作之前能够处理下一个请求作为中断的非易失性存储器控制器，系统和方法。 非易失性存储器系统包括存储从快闪存储器加载的元数据的第一存储器; 存储从第一存储器复制的元数据的第二存储器; 以及闪存控制器，将所述元数据从所述第一存储器复制到所述第二存储器，改变所述第二存储器中的所述元数据，然后在第一类型操作期间将所述改变的元数据从所述第二存储器重新复制到所述第一存储器 这要求更改元数据。

公开(公告)号：US09740630B2

公开(公告)日：2017-08-22

申请号：US14613011

申请日：2015-02-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyun-Seob Lee ,  Jung-Yeon Yoon

IPC: G06F3/06 ,  G06F12/00 ,  G06F12/1009

CPC classification number: G06F12/1009 ,  G06F2003/0691

Abstract: In a method of mapping an address in a storage device, first address mapping information including a first physical address and a first logical address is registered in an address mapping table. The first physical address corresponds to a first storage area in the storage device. The first storage area includes a first type of memory. The first logical address corresponds to the first physical address. Second address mapping information including a second physical address and a second logical address is registered in the address mapping table. The second physical address corresponds to a second storage area in the storage device. The second storage area includes a second type of memory that is different from the first type of memory. The second logical address corresponds to the second physical address.

公开(公告)号：US09542264B2

公开(公告)日：2017-01-10

申请号：US14541303

申请日：2014-11-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kwangseok Im ,  Jung-Yeon Yoon ,  Han-Ju Lee ,  Ha-Neul Jeong

IPC: G11C29/00 ,  G06F11/10 ,  H03M13/09

CPC classification number: G06F11/1004 ,  G06F11/1008 ,  G06F11/1076 ,  H03M13/09

Abstract: A memory controller comprises at least one interface configured to receive a request, user data, and an address from an external source, a first data check engine configured to generate data check information based on the received address and the user data in response to the received request, and a second data check engine configured to check the integrity of the user data based on the generated data check information where the user data is transmitted to the nonvolatile memory. The memory controller is configured to transmit the user data received from the external source to an external destination where the integrity of the user data is verified according to a check result, and is further configured to transmit an interrupt signal to the external source and the external destination where the check result indicates that the user data comprises an error.

Abstract translation: 存储器控制器包括被配置为从外部源接收请求，用户数据和地址的至少一个接口，第一数据检查引擎，被配置为基于接收到的地址和用户数据响应于所接收的地址生成数据检查信息 以及第二数据检查引擎，被配置为基于将用户数据发送到非易失性存储器的所生成的数据检查信息来检查用户数据的完整性。 存储器控制器被配置为根据检查结果将从外部源接收的用户数据发送到外部目的地，其中用户数据的完整性被验证，并且还被配置为将中断信号发送到外部源和外部 检查结果指示用户数据包含错误的目的地。