公开(公告)号：US20130262740A1

公开(公告)日：2013-10-03

申请号：US13802748

申请日：2013-03-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JungSik Kim ,  Jungbae Lee

IPC: G06F12/02

CPC classification number: G06F12/0246 ,  G11C16/3418 ,  G11C29/24 ,  G11C29/50004 ,  G11C29/52

Abstract: Disclosed is a semiconductor memory device which includes a normal memory cell array; a redundancy memory cell array; and a multi-row selection circuit configured to activate a defective normal memory cell or a defective normal word line of the normal memory cell array while activating a redundancy memory cell or a redundancy word line of the redundancy memory cell array.

Abstract translation: 公开了一种包括正常存储单元阵列的半导体存储器件; 冗余存储单元阵列; 以及多行选择电路，被配置为在激活冗余存储单元阵列的冗余存储单元或冗余字线的同时激活正常存储单元阵列的有缺陷的正常存储单元或缺陷正常字线。

公开(公告)号：US11837273B2

公开(公告)日：2023-12-05

申请号：US17872720

申请日：2022-07-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaehyung Lee ,  JungSik Kim ,  Youngdae Lee ,  Duyeul Kim ,  Sungmin Yim ,  Kwangil Park ,  Chulsung Park

IPC: G11C11/4072 ,  H01L25/065 ,  G11C11/408 ,  G11C11/409 ,  H01L23/498 ,  G11C29/02 ,  G11C29/50 ,  G11C5/04 ,  G11C7/10

CPC classification number: G11C11/4072 ,  G11C5/04 ,  G11C11/408 ,  G11C11/409 ,  G11C29/022 ,  G11C29/028 ,  G11C29/50008 ,  H01L23/49838 ,  H01L25/0655 ,  G11C7/109 ,  G11C7/1063 ,  G11C7/1075 ,  H01L2924/0002 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes a first die connected to a first channel, the first die comprising a first memory chip; and a second die connected to a second channel, the second die comprising a second memory chip, the first and second channels being independent of each other and a storage capacity and a physical size of the second die being the same as those of the first die. The first and second dies are disposed in one package, and the package includes an interconnection circuit disposed between the first die and the second die to transfer signals between the first memory chip and the second memory chip.

公开(公告)号：US09805769B2

公开(公告)日：2017-10-31

申请号：US14697634

申请日：2015-04-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaehyung Lee ,  JungSik Kim ,  Youngdae Lee ,  Duyeul Kim ,  Sungmin Yim ,  Kwangil Park ,  Chulsung Park

IPC: G11C5/04 ,  H01L25/065 ,  G11C11/408 ,  G11C11/409 ,  H01L23/498 ,  G11C11/4072 ,  G11C29/02 ,  G11C29/50 ,  G11C7/10

CPC classification number: G11C11/4072 ,  G11C5/04 ,  G11C7/1063 ,  G11C7/1075 ,  G11C7/109 ,  G11C11/408 ,  G11C11/409 ,  G11C29/022 ,  G11C29/028 ,  G11C29/50008 ,  H01L23/49838 ,  H01L25/0655 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes a first die connected to a first channel, the first die comprising a first memory chip; and a second die connected to a second channel, the second die comprising a second memory chip, the first and second channels being independent of each other and a storage capacity and a physical size of the second die being the same as those of the first die. The first and second dies are disposed in one package, and the package includes an interconnection circuit disposed between the first die and the second die to transfer signals between the first memory chip and the second memory chip.

公开(公告)号：US10971208B2

公开(公告)日：2021-04-06

申请号：US16734821

申请日：2020-01-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaehyung Lee ,  JungSik Kim ,  Youngdae Lee ,  Duyeul Kim ,  Sungmin Yim ,  Kwangil Park ,  Chulsung Park

IPC: G11C11/4072 ,  H01L25/065 ,  G11C11/408 ,  G11C11/409 ,  H01L23/498 ,  G11C29/02 ,  G11C29/50 ,  G11C5/04 ,  G11C7/10

Abstract: A semiconductor device includes a first die connected to a first channel, the first die comprising a first memory chip; and a second die connected to a second channel, the second die comprising a second memory chip, the first and second channels being independent of each other and a storage capacity and a physical size of the second die being the same as those of the first die. The first and second dies are disposed in one package, and the package includes an interconnection circuit disposed between the first die and the second die to transfer signals between the first memory chip and the second memory chip.

公开(公告)号：US10734059B2

公开(公告)日：2020-08-04

申请号：US16674554

申请日：2019-11-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaehyung Lee ,  JungSik Kim ,  Youngdae Lee ,  Duyeul Kim ,  Sungmin Yim ,  Kwangil Park ,  Chulsung Park

IPC: G11C11/4072 ,  G11C29/50 ,  G11C11/408 ,  G11C11/409 ,  H01L23/498 ,  G11C5/04 ,  G11C29/02 ,  H01L25/065 ,  G11C7/10

Abstract: A semiconductor device includes a first die connected to a first channel, the first die comprising a first memory chip; and a second die connected to a second channel, the second die comprising a second memory chip, the first and second channels being independent of each other and a storage capacity and a physical size of the second die being the same as those of the first die. The first and second dies are disposed in one package, and the package includes an interconnection circuit disposed between the first die and the second die to transfer signals between the first memory chip and the second memory chip.

公开(公告)号：US11417386B2

公开(公告)日：2022-08-16

申请号：US17205832

申请日：2021-03-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaehyung Lee ,  JungSik Kim ,  Youngdae Lee ,  Duyeul Kim ,  Sungmin Yim ,  Kwangil Park ,  Chulsung Park

IPC: G11C11/4072 ,  H01L23/498 ,  G11C5/04 ,  H01L25/065 ,  G11C11/408 ,  G11C11/409 ,  G11C29/02 ,  G11C29/50 ,  G11C7/10

Abstract: A semiconductor device includes a first die connected to a first channel, the first die comprising a first memory chip; and a second die connected to a second channel, the second die comprising a second memory chip, the first and second channels being independent of each other and a storage capacity and a physical size of the second die being the same as those of the first die. The first and second dies are disposed in one package, and the package includes an interconnection circuit disposed between the first die and the second die to transfer signals between the first memory chip and the second memory chip.

公开(公告)号：US11328760B2

公开(公告)日：2022-05-10

申请号：US16527415

申请日：2019-07-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaehyung Lee ,  JungSik Kim ,  Youngdae Lee ,  Duyeul Kim ,  Sungmin Yim ,  Kwangil Park ,  Chulsung Park

IPC: G11C11/4072 ,  G11C5/04 ,  H01L25/065 ,  G11C11/408 ,  G11C11/409 ,  H01L23/498 ,  G11C29/02 ,  G11C29/50 ,  G11C7/10

Abstract: A semiconductor device includes a first die connected to a first channel, the first die comprising a first memory chip; and a second die connected to a second channel, the second die comprising a second memory chip, the first and second channels being independent of each other and a storage capacity and a physical size of the second die being the same as those of the first die. The first and second dies are disposed in one package, and the package includes an interconnection circuit disposed between the first die and the second die to transfer signals between the first memory chip and the second memory chip.

公开(公告)号：US10418087B2

公开(公告)日：2019-09-17

申请号：US15640854

申请日：2017-07-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaehyung Lee ,  JungSik Kim ,  Youngdae Lee ,  Duyeul Kim ,  Sungmin Yim ,  Kwangil Park ,  Chulsung Park

IPC: G11C11/4072 ,  H01L25/065 ,  G11C11/408 ,  G11C11/409 ,  H01L23/498 ,  G11C29/02 ,  G11C29/50 ,  G11C5/04 ,  G11C7/10

Abstract: A semiconductor device includes a first die connected to a first channel, the first die comprising a first memory chip; and a second die connected to a second channel, the second die comprising a second memory chip, the first and second channels being independent of each other and a storage capacity and a physical size of the second die being the same as those of the first die. The first and second dies are disposed in one package, and the package includes an interconnection circuit disposed between the first die and the second die to transfer signals between the first memory chip and the second memory chip.