公开(公告)号：US11837273B2

公开(公告)日：2023-12-05

申请号：US17872720

申请日：2022-07-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaehyung Lee ,  JungSik Kim ,  Youngdae Lee ,  Duyeul Kim ,  Sungmin Yim ,  Kwangil Park ,  Chulsung Park

IPC: G11C11/4072 ,  H01L25/065 ,  G11C11/408 ,  G11C11/409 ,  H01L23/498 ,  G11C29/02 ,  G11C29/50 ,  G11C5/04 ,  G11C7/10

CPC classification number: G11C11/4072 ,  G11C5/04 ,  G11C11/408 ,  G11C11/409 ,  G11C29/022 ,  G11C29/028 ,  G11C29/50008 ,  H01L23/49838 ,  H01L25/0655 ,  G11C7/109 ,  G11C7/1063 ,  G11C7/1075 ,  H01L2924/0002 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes a first die connected to a first channel, the first die comprising a first memory chip; and a second die connected to a second channel, the second die comprising a second memory chip, the first and second channels being independent of each other and a storage capacity and a physical size of the second die being the same as those of the first die. The first and second dies are disposed in one package, and the package includes an interconnection circuit disposed between the first die and the second die to transfer signals between the first memory chip and the second memory chip.

公开(公告)号：US09805769B2

公开(公告)日：2017-10-31

申请号：US14697634

申请日：2015-04-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaehyung Lee ,  JungSik Kim ,  Youngdae Lee ,  Duyeul Kim ,  Sungmin Yim ,  Kwangil Park ,  Chulsung Park

IPC: G11C5/04 ,  H01L25/065 ,  G11C11/408 ,  G11C11/409 ,  H01L23/498 ,  G11C11/4072 ,  G11C29/02 ,  G11C29/50 ,  G11C7/10

CPC classification number: G11C11/4072 ,  G11C5/04 ,  G11C7/1063 ,  G11C7/1075 ,  G11C7/109 ,  G11C11/408 ,  G11C11/409 ,  G11C29/022 ,  G11C29/028 ,  G11C29/50008 ,  H01L23/49838 ,  H01L25/0655 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes a first die connected to a first channel, the first die comprising a first memory chip; and a second die connected to a second channel, the second die comprising a second memory chip, the first and second channels being independent of each other and a storage capacity and a physical size of the second die being the same as those of the first die. The first and second dies are disposed in one package, and the package includes an interconnection circuit disposed between the first die and the second die to transfer signals between the first memory chip and the second memory chip.

公开(公告)号：US10971208B2

公开(公告)日：2021-04-06

申请号：US16734821

申请日：2020-01-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaehyung Lee ,  JungSik Kim ,  Youngdae Lee ,  Duyeul Kim ,  Sungmin Yim ,  Kwangil Park ,  Chulsung Park

IPC: G11C11/4072 ,  H01L25/065 ,  G11C11/408 ,  G11C11/409 ,  H01L23/498 ,  G11C29/02 ,  G11C29/50 ,  G11C5/04 ,  G11C7/10

Abstract: A semiconductor device includes a first die connected to a first channel, the first die comprising a first memory chip; and a second die connected to a second channel, the second die comprising a second memory chip, the first and second channels being independent of each other and a storage capacity and a physical size of the second die being the same as those of the first die. The first and second dies are disposed in one package, and the package includes an interconnection circuit disposed between the first die and the second die to transfer signals between the first memory chip and the second memory chip.

公开(公告)号：US10734059B2

公开(公告)日：2020-08-04

申请号：US16674554

申请日：2019-11-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaehyung Lee ,  JungSik Kim ,  Youngdae Lee ,  Duyeul Kim ,  Sungmin Yim ,  Kwangil Park ,  Chulsung Park

IPC: G11C11/4072 ,  G11C29/50 ,  G11C11/408 ,  G11C11/409 ,  H01L23/498 ,  G11C5/04 ,  G11C29/02 ,  H01L25/065 ,  G11C7/10

Abstract: A semiconductor device includes a first die connected to a first channel, the first die comprising a first memory chip; and a second die connected to a second channel, the second die comprising a second memory chip, the first and second channels being independent of each other and a storage capacity and a physical size of the second die being the same as those of the first die. The first and second dies are disposed in one package, and the package includes an interconnection circuit disposed between the first die and the second die to transfer signals between the first memory chip and the second memory chip.

公开(公告)号：US11417386B2

公开(公告)日：2022-08-16

申请号：US17205832

申请日：2021-03-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaehyung Lee ,  JungSik Kim ,  Youngdae Lee ,  Duyeul Kim ,  Sungmin Yim ,  Kwangil Park ,  Chulsung Park

IPC: G11C11/4072 ,  H01L23/498 ,  G11C5/04 ,  H01L25/065 ,  G11C11/408 ,  G11C11/409 ,  G11C29/02 ,  G11C29/50 ,  G11C7/10

Abstract: A semiconductor device includes a first die connected to a first channel, the first die comprising a first memory chip; and a second die connected to a second channel, the second die comprising a second memory chip, the first and second channels being independent of each other and a storage capacity and a physical size of the second die being the same as those of the first die. The first and second dies are disposed in one package, and the package includes an interconnection circuit disposed between the first die and the second die to transfer signals between the first memory chip and the second memory chip.

公开(公告)号：US11328760B2

公开(公告)日：2022-05-10

申请号：US16527415

申请日：2019-07-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaehyung Lee ,  JungSik Kim ,  Youngdae Lee ,  Duyeul Kim ,  Sungmin Yim ,  Kwangil Park ,  Chulsung Park

IPC: G11C11/4072 ,  G11C5/04 ,  H01L25/065 ,  G11C11/408 ,  G11C11/409 ,  H01L23/498 ,  G11C29/02 ,  G11C29/50 ,  G11C7/10

Abstract: A semiconductor device includes a first die connected to a first channel, the first die comprising a first memory chip; and a second die connected to a second channel, the second die comprising a second memory chip, the first and second channels being independent of each other and a storage capacity and a physical size of the second die being the same as those of the first die. The first and second dies are disposed in one package, and the package includes an interconnection circuit disposed between the first die and the second die to transfer signals between the first memory chip and the second memory chip.

公开(公告)号：US10418087B2

公开(公告)日：2019-09-17

申请号：US15640854

申请日：2017-07-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaehyung Lee ,  JungSik Kim ,  Youngdae Lee ,  Duyeul Kim ,  Sungmin Yim ,  Kwangil Park ,  Chulsung Park

IPC: G11C11/4072 ,  H01L25/065 ,  G11C11/408 ,  G11C11/409 ,  H01L23/498 ,  G11C29/02 ,  G11C29/50 ,  G11C5/04 ,  G11C7/10

Abstract: A semiconductor device includes a first die connected to a first channel, the first die comprising a first memory chip; and a second die connected to a second channel, the second die comprising a second memory chip, the first and second channels being independent of each other and a storage capacity and a physical size of the second die being the same as those of the first die. The first and second dies are disposed in one package, and the package includes an interconnection circuit disposed between the first die and the second die to transfer signals between the first memory chip and the second memory chip.

公开(公告)号：US10090039B2

公开(公告)日：2018-10-02

申请号：US15678436

申请日：2017-08-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Suyeon Doo ,  Taeyoung Oh ,  Namjong Kim ,  Chulsung Park

IPC: G11C11/406 ,  G11C7/04

Abstract: A semiconductor memory device includes a memory circuit including a plurality of memory cells and a refresh control circuit. The refresh control circuit is configured to determine a number of times to perform a target row refresh (TRR) in response to a mode register set (MRS) code signal, wherein the MRS code signal is generated in response to a temperature change, and the refresh control circuit is configured to maintain a refresh cycle of at least two of the memory cells for a period of time when the refresh cycle is changed due to the temperature change.

公开(公告)号：US09899361B2

公开(公告)日：2018-02-20

申请号：US15254259

申请日：2016-09-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyoungjoon Kim ,  Kwangil Park ,  Seok-Hong Kwon ,  Chulsung Park ,  Eunsung Seo ,  Heejin Lee ,  Kijong Park

IPC: H01L23/02 ,  H01L25/18 ,  H01L23/00 ,  H01L25/065

CPC classification number: H01L25/18 ,  H01L24/17 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/1703 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73253 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06558 ,  H01L2225/06562 ,  H01L2225/06568 ,  H01L2225/06589 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15311

Abstract: A semiconductor package includes a logic chip mounted on a substrate, a first memory chip disposed on the logic chip, which includes a first active surface, and a second memory chip disposed on the first memory chip. The second memory chip is disposed on the first memory chip in such a way that the first memory chip and second memory chip are offset from each other. The second memory chip has a second active surface. The first active surface and the second active surface face each other and are electrically connected to each other through a first solder bump.

公开(公告)号：US20170345484A1

公开(公告)日：2017-11-30

申请号：US15678436

申请日：2017-08-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SUYEON DOO ,  Taeyoung Oh ,  Namjong Kim ,  Chulsung Park

IPC: G11C11/406

CPC classification number: G11C11/40626 ,  G11C11/406

Abstract: A semiconductor memory device includes a memory circuit including a plurality of memory cells and a refresh control circuit. The refresh control circuit is configured to determine a number of times to perform a target row refresh (TRR) in response to a mode register set (MRS) code signal, wherein the MRS code signal is generated in response to a temperature change, and the refresh control circuit is configured to maintain a refresh cycle of at least two of the memory cells for a period of time when the refresh cycle is changed due to the temperature change.