公开(公告)号：US20230170800A1

公开(公告)日：2023-06-01

申请号：US17994134

申请日：2022-11-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Huidong Gwon ,  Byongdeok Choi ,  Taehwang Kong ,  Junhyeok Yang ,  Junhwan Jang

IPC: H02M3/157 ,  H03M1/44 ,  H03M1/50 ,  H03M1/06

CPC classification number: H02M3/157 ,  H03M1/44 ,  H03M1/502 ,  H03M1/0607

Abstract: An LDO regulator includes a voltage-to-time converter configured to convert a fluctuation in an output voltage sensed from an output node into a time domain signal having a pulse type, and output the time domain signal, based on a clock signal; a time-to-voltage converter configured to receive the time domain signal, convert the time domain signal into a first voltage control signal performing first compensation for the output voltage, and output the first voltage control signal; an analog amplifier configured to output a second voltage control signal continuously performing second compensation for the output voltage, regardless of the clock signal; and a first pass transistor configured to drive the output voltage based on the second voltage control signal. The LDO regulator is configured to reduce the fluctuation in the output voltage, based on the first compensation and the second compensation.

公开(公告)号：US12259742B2

公开(公告)日：2025-03-25

申请号：US17994134

申请日：2022-11-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Huidong Gwon ,  Byongdeok Choi ,  Taehwang Kong ,  Junhyeok Yang ,  Junhwan Jang

IPC: G05F1/59 ,  G05F1/575 ,  H02M3/157 ,  H03M1/06 ,  H03M1/44 ,  H03M1/50

Abstract: An LDO regulator includes a voltage-to-time converter configured to convert a fluctuation in an output voltage sensed from an output node into a time domain signal having a pulse type, and output the time domain signal, based on a clock signal; a time-to-voltage converter configured to receive the time domain signal, convert the time domain signal into a first voltage control signal performing first compensation for the output voltage, and output the first voltage control signal; an analog amplifier configured to output a second voltage control signal continuously performing second compensation for the output voltage, regardless of the clock signal; and a first pass transistor configured to drive the output voltage based on the second voltage control signal. The LDO regulator is configured to reduce the fluctuation in the output voltage, based on the first compensation and the second compensation.