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公开(公告)号:US10716755B2
公开(公告)日:2020-07-21
申请号:US16237913
申请日:2019-01-02
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Youngbeom Pyon , Kichul Park , Inkwon Kim , Ki Hoon Jang , Byoungho Kwon , Sangkyun Kim , Boun Yoon
IPC: H01L27/112 , H01L23/535 , H01L23/528 , H01L27/11565 , H01L27/1157 , H01L27/11573 , H01L27/11575 , H01L27/11582 , H01L21/768 , H01L27/11551 , H01L27/11578 , H01L21/02 , H01L23/538 , A61K9/06 , A61K45/06 , A61K9/00 , A61K31/197 , A61K47/10 , A61K47/12 , A61K47/20 , A61K47/32 , A61K47/44
Abstract: A semiconductor device includes a substrate, a peripheral structure, a lower insulating layer, and a stack. The substrate includes a peripheral circuit region and a cell array region. The peripheral structure is on the peripheral circuit region. The lower insulating layer covers the peripheral circuit region and the cell array region and has a protruding portion protruding from a flat portion. The stack is on the lower insulating layer and the cell array region, and includes upper conductive patterns and insulating patterns which are alternately and repeatedly stacked.
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公开(公告)号:US10741409B2
公开(公告)日:2020-08-11
申请号:US15722413
申请日:2017-10-02
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyo Jung Kim , Ye Hwan Kim , Ki Hoon Jang , Byoung Ho Kwon , Bo Un Yoon
IPC: H01L21/321 , H01L21/762 , H01L21/02 , H01L21/3105
Abstract: A method of manufacturing a semiconductor device includes preparing an object layer on a substrate; polishing the object layer with a first slurry including a first abrasive having a zeta potential of a first polarity; rinsing a surface of the object layer, using a rinsing solution including a chemical of a second polarity, opposite to the first polarity; and polishing the object layer with a second slurry including a second abrasive having a zeta potential of a second polarity, opposite to the first polarity.
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公开(公告)号:US10177160B2
公开(公告)日:2019-01-08
申请号:US15661280
申请日:2017-07-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Youngbeom Pyon , Kichul Park , Inkwon Kim , Ki Hoon Jang , Byoungho Kwon , Sangkyun Kim , Boun Yoon
IPC: H01L21/00 , H01L23/528 , H01L27/112 , H01L23/535 , H01L27/11551 , H01L27/11578 , H01L21/768 , H01L21/02 , H01L23/538
Abstract: A semiconductor device includes a substrate, a peripheral structure, a lower insulating layer, and a stack. The substrate includes a peripheral circuit region and a cell array region. The peripheral structure is on the peripheral circuit region. The lower insulating layer covers the peripheral circuit region and the cell array region and has a protruding portion protruding from a flat portion. The stack is on the lower insulating layer and the cell array region, and includes upper conductive patterns and insulating patterns which are alternately and repeatedly stacked.
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公开(公告)号:US20180130672A1
公开(公告)日:2018-05-10
申请号:US15722413
申请日:2017-10-02
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyo Jung Kim , Ye Hwan Kim , Ki Hoon Jang , Byoung Ho Kwon , Bo Un Yoon
IPC: H01L21/321
CPC classification number: H01L21/32125 , H01L21/02065 , H01L21/02074 , H01L21/31053 , H01L21/3212 , H01L21/762 , H01L21/76224
Abstract: A method of manufacturing a semiconductor device includes preparing an object layer on a substrate; polishing the object layer with a first slurry including a first abrasive having a zeta potential of a first polarity; rinsing a surface of the object layer, using a rinsing solution including a chemical of a second polarity, opposite to the first polarity; and polishing the object layer with a second slurry including a second abrasive having a zeta potential of a second polarity, opposite to the first polarity.
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