公开(公告)号：US20140327155A1

公开(公告)日：2014-11-06

申请号：US14134589

申请日：2013-12-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Taegyu Kang ,  Minchul Kim ,  Sung-Jin Kim ,  Kyeongjun Song

IPC: H01L23/28 ,  H01L23/00 ,  H01L25/065

CPC classification number: H01L25/50 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/3135 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/15331 ,  H01L2924/00012

Abstract: A semiconductor package comprises a lower package comprising a lower substrate, a lower semiconductor chip mounted on a surface of the lower substrate, connection terminals between the lower substrate and the lower semiconductor chip, and a protection film covering the lower semiconductor chip. An upper package is spaced apart from the lower package on an upper surface of the lower substrate, the upper package comprising an upper substrate and an upper semiconductor chip. Connections are present between the lower substrate and the upper substrate to horizontally surround the lower semiconductor chip. A molding film is on the upper surface of the lower substrate to fill spaces between the connection terminals and the connections. An uppermost surface of the protection film is positioned at substantially a same vertical level as an uppermost surface of the molding film and is spaced apart from the upper package.

Abstract translation: 半导体封装包括下封装，其包括下基板，安装在下基板的表面上的下半导体芯片，下基板和下半导体芯片之间的连接端子以及覆盖下半导体芯片的保护膜。 上封装在下基板的上表面上与下封装隔开，上封装包括上基板和上半导体芯片。 连接存在于下基板和上基板之间以水平地围绕下半导体芯片。 成型膜位于下基板的上表面上，以填充连接端子和连接件之间的空间。 保护膜的最上表面位于与成型膜的最上表面大致相同的垂直高度，并且与上包装件间隔开。

公开(公告)号：US20150318270A1

公开(公告)日：2015-11-05

申请号：US14796519

申请日：2015-07-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Taegyu Kang ,  Minchul Kim ,  Sung-Jin Kim ,  Kyeongjun Song

IPC: H01L25/00 ,  H01L21/56 ,  H01L25/065

CPC classification number: H01L25/50 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/3135 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/15331 ,  H01L2924/00012

Abstract: A semiconductor package comprises a lower package comprising a lower substrate, a lower semiconductor chip mounted on a surface of the lower substrate, connection terminals between the lower substrate and the lower semiconductor chip, and a protection film covering the lower semiconductor chip. An upper package is spaced apart from the lower package on an upper surface of the lower substrate, the upper package comprising an upper substrate and an upper semiconductor chip. Connections are present between the lower substrate and the upper substrate to horizontally surround the lower semiconductor chip. A molding film is on the upper surface of the lower substrate to fill spaces between the connection terminals and the connections. An uppermost surface of the protection film is positioned at substantially a same vertical level as an uppermost surface of the molding film and is spaced apart from the upper package.

Abstract translation: 半导体封装包括下封装，其包括下基板，安装在下基板的表面上的下半导体芯片，下基板和下半导体芯片之间的连接端子以及覆盖下半导体芯片的保护膜。 上封装在下基板的上表面上与下封装隔开，上封装包括上基板和上半导体芯片。 连接存在于下基板和上基板之间以水平地围绕下半导体芯片。 成型膜位于下基板的上表面上，以填充连接端子和连接件之间的空间。 保护膜的最上表面位于与成型膜的最上表面大致相同的垂直高度，并且与上包装件间隔开。