公开(公告)号：US11100959B2

公开(公告)日：2021-08-24

申请号：US16560127

申请日：2019-09-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyu-Rie Sim ,  Taehui Na

IPC: G11C5/06 ,  H01L27/24 ,  G11C5/02 ,  H01L45/00

Abstract: A variable resistance memory device includes memory cell stacks arranged in a first direction, the memory cell stacks including a first memory cell stack and a second memory cell stack. Each of the memory cell stacks includes a plurality of word lines, each word line of the plurality of word lines extending in a second direction intersecting the first direction and arranged in a third direction intersecting the first and second directions, and a memory cell connected to each of the plurality of word lines. Each of the memory cells includes a switching element and a variable resistance element. Each of the plurality of word lines of the first memory cell stack have a first thickness, in the first direction, of first word lines of the first memory cell stack is less than a second thickness, in the first direction, of each of the plurality of word lines of the second memory cell stack.

公开(公告)号：US10593874B2

公开(公告)日：2020-03-17

申请号：US16055512

申请日：2018-08-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyu-Rie Sim ,  Dae-Hwan Kang ,  Gwan-Hyeob Koh

IPC: H01L43/08 ,  H01L43/10 ,  H01L27/24 ,  H01L45/00

Abstract: A variable resistance memory device includes first memory cells and second memory cells. The first memory cells are between first and second conductive lines, and at areas at which the first and second conductive lines overlap. The second memory cells are between the second and third conductive lines, and at areas at which the second and third conductive lines overlap. Each first memory cell includes a first variable resistance pattern and a first selection pattern. Each second memory cell includes a second variable resistance pattern and a second selection pattern. At least one of the second memory cells is shifted from a closest one of the first memory cells.

公开(公告)号：US09716129B1

公开(公告)日：2017-07-25

申请号：US15285922

申请日：2016-10-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyu-Rie Sim ,  Gwan-Hyeob Koh ,  Dae-Hwan Kang

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L27/2481 ,  H01L27/2427 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144 ,  H01L45/1608 ,  H01L45/1675

Abstract: The inventive concept provides a memory device, in which memory cells are arranged to have a low variation in electrical characteristics and thereby enhanced reliability, an electronic apparatus including the memory device, and a method of manufacturing the memory device. In the memory device, memory cells at different levels may be covered with spacers having different thicknesses, and this may control resistance characteristics (e.g., set resistance) of the memory cells and to reduce a vertical variation in electrical characteristics of the memory cells. Furthermore, by adjusting the thicknesses of the spacers, a sensing margin of the memory cells may increase.

公开(公告)号：US10734450B2

公开(公告)日：2020-08-04

申请号：US16666752

申请日：2019-10-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyu-Rie Sim ,  Gwan-Hyeob Koh ,  Dae-Hwan Kang

IPC: H01L27/24 ,  H01L45/00

Abstract: The inventive concept provides a memory device, in which memory cells are arranged to have a low variation in electrical characteristics and thereby enhanced reliability, an electronic apparatus including the memory device, and a method of manufacturing the memory device. In the memory device, memory cells at different levels may be covered with spacers having different thicknesses, and this may control resistance characteristics (e.g., set resistance) of the memory cells and to reduce a vertical variation in electrical characteristics of the memory cells. Furthermore, by adjusting the thicknesses of the spacers, a sensing margin of the memory cells may increase.

公开(公告)号：US20200066801A1

公开(公告)日：2020-02-27

申请号：US16666752

申请日：2019-10-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyu-Rie Sim ,  Gwan-Hyeob Koh ,  Dae-Hwan Kang

IPC: H01L27/24 ,  H01L45/00

Abstract: The inventive concept provides a memory device, in which memory cells are arranged to have a low variation in electrical characteristics and thereby enhanced reliability, an electronic apparatus including the memory device, and a method of manufacturing the memory device. In the memory device, memory cells at different levels may be covered with spacers having different thicknesses, and this may control resistance characteristics (e.g., set resistance) of the memory cells and to reduce a vertical variation in electrical characteristics of the memory cells. Furthermore, by adjusting the thicknesses of the spacers, a sensing margin of the memory cells may increase.

公开(公告)号：US10062840B2

公开(公告)日：2018-08-28

申请号：US15332042

申请日：2016-10-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyu-Rie Sim ,  Dae-Hwan Kang ,  Gwan-Hyeob Koh

IPC: H01L45/00 ,  H01L43/08 ,  H01L43/10 ,  H01L27/24

CPC classification number: H01L45/1233 ,  H01L27/2427 ,  H01L27/2481 ,  H01L43/08 ,  H01L43/10 ,  H01L45/04 ,  H01L45/06 ,  H01L45/126 ,  H01L45/1293 ,  H01L45/141 ,  H01L45/143 ,  H01L45/144 ,  H01L45/146 ,  H01L45/147 ,  H01L45/1608 ,  H01L45/1675

Abstract: A variable resistance memory device includes first memory cells and second memory cells. The first memory cells are between first and second conductive lines, and at areas at which the first and second conductive lines overlap. The second memory cells are between the second and third conductive lines, and at areas at which the second and third conductive lines overlap. Each first memory cell includes a first variable resistance pattern and a first selection pattern. Each second memory cell includes a second variable resistance pattern and a second selection pattern. At least one of the second memory cells is shifted from a closest one of the first memory cells.