公开(公告)号：US20230178440A1

公开(公告)日：2023-06-08

申请号：US17677329

申请日：2022-02-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： MING HE ,  Jaehyun Park ,  Mehdi Saremi ,  Rebecca Park ,  Harsono Simka ,  Daewon Ha

IPC: H01L21/8238 ,  H01L27/092

CPC classification number: H01L21/823814 ,  H01L27/0922 ,  H01L21/823871 ,  H01L21/823878 ,  H01L29/0665

Abstract: Integrated circuit devices and methods of forming the integrated circuit device are provided. The methods may include providing a preliminary transistor stack including an upper sacrificial layer on a substrate, an upper active region between the substrate and the upper sacrificial layer, a lower sacrificial layer between the substrate and the upper active region, and a lower active region between the substrate and the lower sacrificial layer. The methods may further include forming lower source/drain regions on respective opposing side surfaces of the lower active region, forming a preliminary capping layer on a first lower source/drain region of the lower source/drain regions, the preliminary capping layer including a semiconductor material, converting the preliminary capping layer to a capping layer that includes an insulating material, and forming upper source/drain regions on respective opposing side surfaces of the upper active region.

公开(公告)号：US20230074982A1

公开(公告)日：2023-03-09

申请号：US17546470

申请日：2021-12-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： MING HE ,  HARSONO SIMKA ,  ANTHONY DONGICK LEE ,  SEOWOO NAM ,  SANG HOON AHN

IPC: H01L21/768 ,  H01L21/3105 ,  H01L21/311 ,  H01L23/535 ,  H01L23/532

Abstract: Integrated circuit devices including a via and methods of forming the same are provided. The methods may include forming a conductive wire structure on a substrate. The conductive wire structure may include a first insulating layer and a conductive wire stack in the first insulating layer, and the conductive wire stack may include a conductive wire and a mask layer stacked on the substrate. The method may also include forming a recess in the first insulating layer by removing the mask layer, the recess exposing the conductive wire, forming an etch stop layer and then a second insulating layer on the first insulating layer and in the recess of the first insulating layer, and forming a conductive via extending through the second insulating layer and the etch stop layer and contacting the conductive wire.