公开(公告)号：US20130302959A1

公开(公告)日：2013-11-14

申请号：US13790076

申请日：2013-03-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seonghwee CHEONG ,  Mansug KANG ,  Joon KIM ,  Kihong NAM ,  Gyuwan CHOI

IPC: H01L29/66

CPC classification number: H01L29/66666 ,  H01L27/1052 ,  H01L27/10876 ,  H01L27/228 ,  H01L27/2454

Abstract: A semiconductor device with vertical channel transistors and a method of fabricating the same are provided. A method of fabricating the semiconductor device includes patterning a substrate to form a trench that defines an active region, forming a sacrificial pattern in a lower region of the trench, forming a spacer on an upper sidewall of the trench, recessing a top surface of the sacrificial pattern to form a window exposing a sidewall of the active region between the spacer and the sacrificial pattern, doping a sidewall of the trench through the window to form a doped region in the active region, and forming a wiring in the trench to be connected to the doped region.

Abstract translation: 提供了具有垂直沟道晶体管的半导体器件及其制造方法。 一种制造半导体器件的方法包括图案化衬底以形成限定有源区的沟槽，在沟槽的下部区域中形成牺牲图案，在沟槽的上侧壁上形成间隔物，使沟槽的顶面凹陷 牺牲图案以形成暴露间隔物和牺牲图案之间的有源区域的侧壁的窗口，通过窗口掺杂沟槽的侧壁以在有源区域中形成掺杂区域，以及在待连接的沟槽中形成布线 到掺杂区域。

公开(公告)号：US20140367755A1

公开(公告)日：2014-12-18

申请号：US14475844

申请日：2014-09-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyungmun BYUN ,  Hyongsoo KIM ,  Mansug KANG ,  Eunkee HONG

IPC: H01L27/108

CPC classification number: H01L27/10808 ,  H01L27/10852 ,  H01L28/90

Abstract: A capacitor dielectric can be between the storage node and the electrode layer. A supporting pattern can be connected to the storage node, where the supporting pattern can include at least one first pattern and at least one second pattern layered on one another, where the first pattern can include a material having an etch selectivity with respect to the second pattern.

Abstract translation: 电容器电介质可以在存储节点和电极层之间。 支撑图案可以连接到存储节点，其中支撑图案可以包括至少一个第一图案和彼此分层的至少一个第二图案，其中第一图案可以包括具有相对于第二图案的蚀刻选择性的材料 模式。

公开(公告)号：US20130270507A1

公开(公告)日：2013-10-17

申请号：US13792952

申请日：2013-03-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JeongHee PARK ,  Mansug KANG

IPC: H01L45/00

CPC classification number: H01L45/1253 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/143 ,  H01L45/144 ,  H01L45/16 ,  H01L45/1683

Abstract: A variable resistance memory device includes a lower electrode on a substrate, a variable resistance pattern on the lower electrode, and an upper electrode on the variable resistance pattern. The upper electrode is in contact with at least a sidewall of the variable resistance pattern.

Abstract translation: 可变电阻存储器件包括衬底上的下电极，下电极上的可变电阻图案和可变电阻图案上的上电极。 上电极与可变电阻图案的至少一个侧壁接触。