Abstract:
A processing apparatus for managing power based on data is provided. The processing apparatus may obtain, in response to an access request from a processor for particular data stored in a memory, existing power information having a predefined correspondence to the particular data, and control a power mode of the processor based on the existing power information.
Abstract:
An apparatus and method for processing rendering data that may group vertex data that is received from a host computer, and may assign a shader processing unit to process a vertex shader among one or more shader processing units, and process the grouped vertex data using the assigned shader processing unit.
Abstract:
An image processing apparatus. A rendering unit of the image processing apparatus may perform rendering with respect to each of N passes by applying a multi-pass rendering process with respect to an object in an image. The image processing apparatus may include a texture buffer to store information about at least one pixel using second pass rendering different from first pass rendering, while performing the first pass rendering corresponding to a process of generating a final result image among the N passes.
Abstract:
An apparatus for electronic signature verification, including a grouping unit to group, into at least one group, a plurality of kernels included in an application to which electronic signature verification is to be performed, and an electronic signature verification unit to perform electronic signature verification with respect to the at least one group.
Abstract:
An apparatus for performing partition scheduling in a manycore environment. The apparatus may perform partition scheduling based on a priority and in this instance, may perform partition scheduling to minimize the number of idle cores. The apparatus may include a partition queue to manage a partition scheduling event; a partition scheduler including a core map to store hardware information of each of the plurality of cores; and a partition manager to perform partition scheduling with respect to the plurality of cores in response to the partition scheduling event, using the hardware information.