公开(公告)号：US20250132256A1

公开(公告)日：2025-04-24

申请号：US18603656

申请日：2024-03-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： JINTAE KIM ,  PANJAE PARK ,  KANG-ILL SEO

IPC: H01L23/528 ,  H01L27/092

Abstract: CMOS devices are provided. A CMOS device includes a PMOS transistor and an NMOS transistor. Moreover, the CMOS device includes a dual power rail having a front-side power rail and a back-side power rail that are both coupled to one of the PMOS transistor or the NMOS transistor. The PMOS transistor and the NMOS transistor are in a vertical transistor stack, or are side-by-side.

公开(公告)号：US20240363491A1

公开(公告)日：2024-10-31

申请号：US18240675

申请日：2023-08-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： SEUNGCHAN YUN ,  WONHYUK HONG ,  PANJAE PARK ,  KANG-ILL SEO

IPC: H01L23/48 ,  H01L21/768 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L23/481 ,  H01L21/76898 ,  H01L21/823475 ,  H01L27/088 ,  H01L29/0673 ,  H01L29/41733 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/775 ,  H01L29/78696

Abstract: Integrated circuit devices and methods of forming the same are provided. The integrated circuit devices may include a transistor comprising a source/drain region on a substrate; a backside power rail spaced apart from the source/drain region; and a power contact that is between the source/drain region and the backside power rail and electrically connects the source/drain region to the backside power rail. The substrate may be between the source/drain region and the backside power rail, and a centerline in a width direction of the source/drain region is angled with respect to a centerline in a width direction of the power contact.