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    SEMICONDUCTOR MEMORY DEVICES
    1.
    发明申请
    SEMICONDUCTOR MEMORY DEVICES 有权

    公开(公告)号：US20210143154A1

    公开(公告)日：2021-05-13

    申请号：US17126195

    申请日：2020-12-18

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： KISEOK LEE ,  BONG-SOO KIM ,  JIYOUNG KIM ,  HUI-JUNG KIM ,  SEOKHAN PARK ,  HUNKOOK LEE ,  YOOSANG HWANG

    IPC: H01L27/108 ,  H01L23/528 ,  H01L29/08 ,  H01L29/165 ,  H01L29/10

    Abstract: Semiconductor memory devices may include first and second stacks on a substrate and first and second interconnection lines on the first and second stacks. Each of the first and second stacks may include semiconductor patterns vertically stacked on the substrate, conductive lines connected to the semiconductor patterns, respectively, and a gate electrode that is adjacent to the semiconductor patterns and extends in a vertical direction. The first stack may include a first conductive line and a first gate electrode, and the second stack may include a second conductive line and a second gate electrode. Lower surfaces of the first and second conductive lines may be coplanar. The first interconnection line may be electrically connected to at least one of the first and second conductive lines. The second interconnection line may be electrically connected to at least one of the first and second gate electrodes.

    CAPACITOR STRUCTURE
    2.
    发明申请
    CAPACITOR STRUCTURE 有权

    公开(公告)号：US20250048617A1

    公开(公告)日：2025-02-06

    申请号：US18736153

    申请日：2024-06-06

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： BYEUNGMOO KANG ,  SEOKHAN PARK ,  KISEOK LEE

    IPC: H10B12/00

    Abstract: A capacitor structure may include a plurality of lower electrodes arranged in a first direction and a second direction perpendicular to the first direction, a supporter including a plurality of openings and adjoining the plurality of lower electrodes, a dielectric layer covering the supporter and the plurality of lower electrodes, and an upper electrode covering the dielectric layer, where each of the plurality of openings contacts four lower electrodes, and where the plurality of openings contact opposite sides of the plurality of lower electrodes along the first direction and the second direction.

    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD
    3.
    发明申请
    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD 有权

    公开(公告)号：US20230039823A1

    公开(公告)日：2023-02-09

    申请号：US17872143

    申请日：2022-07-25

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： SEONGJIN JEONG ,  SEOKHAN PARK ,  YEJEE SUNWOO ,  BOWON YOO ,  YOUNGWOONG SON

    IPC: H01L27/108

    Abstract: A semiconductor device includes; cell transistors on a substrate, lower electrodes respectively connected to the cell transistors, arranged according to a first pitch in a first horizontal direction, and extending in a vertical direction, and an etching stop layer surrounding lower sidewalls of the lower electrodes and arranged at a level higher than a level of the cell transistors, wherein the etching stop layer includes a first portion vertically overlapping the lower electrodes and a second portion laterally surrounding the first portion, and the second portion includes recesses arranged according to a second pitch in the first horizontal direction.

    SEMICONDUCTOR DEVICE
    4.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20250063724A1

    公开(公告)日：2025-02-20

    申请号：US18614839

    申请日：2024-03-25

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： GYUHWAN OH ,  JINWOO HAN ,  SEOKHAN PARK ,  SUNG-MIN PARK ,  BOWON YOO

    IPC: H10B12/00 ,  H01L23/522

    Abstract: A semiconductor device includes a substrate. Bit lines are disposed on the substrate and extend in a first direction. A shield pattern is disposed on the bit lines. A first word line is disposed on the bit lines. The first word line extends in a second direction crossing the first direction. A second word line extends on the bit lines in the second direction and is spaced apart from the first word line in the first direction. A first active pattern and a second active pattern are disposed on the bit lines and are positioned between the first word line and the second word line. The shield pattern includes an opening pattern disposed between adjacent bit lines of the bit lines.

    SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME
    5.
    发明公开
    SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME 审中-公开

    公开(公告)号：US20230389289A1

    公开(公告)日：2023-11-30

    申请号：US18171171

    申请日：2023-02-17

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： SEOKHAN PARK ,  KISEOK LEE ,  SEOKHO SHIN ,  HYUNGEUN CHOI ,  BOWON YOO

    IPC: H10B12/00

    CPC classification number: H10B12/315 ,  H10B12/482 ,  H10B12/488 ,  H10B12/05

    Abstract: A semiconductor device includes bit line structures on a substrate. Each bit line structure extends in a second direction, and the bit line structures are spaced apart from each other in a first direction. The semiconductor device further includes semiconductor patterns spaced apart from each other in the second direction on each of the bit line structures, insulating interlayer patterns between neighboring ones of the semiconductor patterns in the first direction, and word lines spaced apart from each other in the second direction on the bit line structures. Each word line extends in the first direction adjacent to the semiconductor patterns. The semiconductor device further includes capacitors disposed on and electrically connected to the semiconductor patterns, respectively. A seam extending in the second direction is formed in each of the insulating interlayer patterns.

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