公开(公告)号：US20210408004A1

公开(公告)日：2021-12-30

申请号：US17469340

申请日：2021-09-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Ho LEE ,  Eun A KIM ,  Ki Seok LEE ,  Jay-Bok CHOI ,  Keun Nam KIM ,  Yong Seok AHN ,  Jin-Hwan CHUN ,  Sang Yeon HAN ,  Sung Hee HAN ,  Seung Uk HAN ,  Yoo Sang HWANG

IPC: H01L27/108 ,  H01L23/528

Abstract: A semiconductor device includes a device isolation layer defining first and second active regions, a buried contact connected to the second active region, and first and second bit line structures disposed on the first and second active regions. Each of the first and second bit line structures comprises a bit line contact part and a bit line pass part. The bit line contact part is electrically connected to the first active region. The bit line pass part is disposed on the device isolation layer. A height of a lowest part of the buried contact is smaller than a height of a lowest part of the bit line pass part. The height of the lowest part of the buried contact is greater than a height of a lowest part of the bit line contact part. A lower end of the bit line pass part is buried in the second active region.

公开(公告)号：US20240162039A1

公开(公告)日：2024-05-16

申请号：US18483176

申请日：2023-10-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Bon Hyun GU ,  Soo Yong LEE ,  Bong Cheol KIM ,  Sang Ho LEE

IPC: H01L21/027 ,  H01L21/56 ,  H01L21/66

CPC classification number: H01L21/0274 ,  H01L21/565 ,  H01L22/12

Abstract: Provided is a method for manufacturing a photomask. The method comprises providing a pre-photomask, the pre-photomask including a first area, a second area configured to perform a first duty correction, and a third area configured to perform a second duty correction; forming a pre-photoresist pattern using the pre-photomask such that the pre-photoresist pattern has a stepped shape having at least three steps in a cross-sectional view of the pre-photoresist pattern; analyzing a profile of the pre-photoresist pattern in the cross-sectional view; and inserting an auxiliary pattern into at least one of the first to third areas, based on a result of the analyzing of the profile of the pre-photoresist pattern.

公开(公告)号：US20230139252A1

公开(公告)日：2023-05-04

申请号：US17881032

申请日：2022-08-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seok Hwan LEE ,  Ki Seok LEE ,  Sang Ho LEE

IPC: H01L27/108 ,  H01L23/528

Abstract: A semiconductor device includes a device isolation layer defining a cell active area in a substrate. A plurality of buried contacts is electrically connected with the substrate and arranged in a first direction. A bit line structure extends in a second direction between adjacent buried contacts of the plurality of buried contacts. The bit line structure includes a bit line pass portion and a bit line contact portion. The bit line structure is electrically connected with the cell active area. A first buffer pattern is disposed between the substrate and the bit line pass portion. The first buffer pattern has a T-shape in a cross-section taken along the first direction.

公开(公告)号：US20220026071A1

公开(公告)日：2022-01-27

申请号：US17498518

申请日：2021-10-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yeong Hyeok KIM ,  Sang Jun PARK ,  Sang Ho LEE

IPC: F24C3/12 ,  F24C7/08 ,  G05G1/08 ,  G05G5/00 ,  G05G1/10

Abstract: A cooking appliance capable of preventing a user's unintended rotation of a knob assembly includes: a main body including a control panel; a valve positioned inside the main body, and including a valve shaft being pushable and rotatable; and a knob assembly including an inner knob coupled with the valve shaft, and an outer knob being movable with respect to the inner knob in a first direction in which the outer knob approaches the inner knob, wherein, when the outer knob moves by a first push distance in the first direction, the valve shaft and the inner knob are prevented from rotating.

公开(公告)号：US20210098460A1

公开(公告)日：2021-04-01

申请号：US16860276

申请日：2020-04-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Ho LEE ,  Eun A KIM ,  Ki Seok LEE ,  Jay-Bok CHOI ,  Keun Nam KIM ,  Yong Seok AHN ,  Jin-Hwan CHUN ,  Sang Yeon HAN ,  Sung Hee HAN ,  Seung Uk HAN ,  Yoo Sang HWANG

IPC: H01L27/108 ,  H01L23/528

Abstract: A semiconductor device includes a device isolation layer defining first and second active regions, a buried contact connected to the second active region, and first and second bit line structures disposed on the first and second active regions. Each of the first and second bit line structures comprises a bit line contact part and a bit line pass part. The bit line contact part is electrically connected to the first active region. The bit line pass part is disposed on the device isolation layer. A height of a lowest part of the buried contact is smaller than a height of a lowest part of the bit line pass part. The height of the lowest part of the buried contact is greater than a height of a lowest part of the bit line contact part. A lower end of the bit line pass part is buried in the second active region.