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公开(公告)号:US20240334678A1
公开(公告)日:2024-10-03
申请号:US18735313
申请日:2024-06-06
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jong In KANG , Jun Young CHOI , Yoon Gi HONG , Tae Hoon KIM , Sung-Jin YEO , Sang Yeon HAN
IPC: H10B12/00
CPC classification number: H10B12/315 , H10B12/34
Abstract: A semiconductor device is provided. The semiconductor device includes a substrate which includes a cell region and a core region, a boundary element separation film which is placed inside the substrate, and separates the cell region and the core region, and a bit line which is placed on the cell region and the boundary element separation film and extends along a first direction, in which the boundary element separation film includes a first region and a second region, a height of an upper side of the first region of the boundary element separation film is different from a height of an upper side of the second region of the boundary element separation film, on a basis of a bottom side of the boundary element separation film, and the bit line is placed over the first region and the second region of the boundary element separation film.
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公开(公告)号:US20210408004A1
公开(公告)日:2021-12-30
申请号:US17469340
申请日:2021-09-08
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sang Ho LEE , Eun A KIM , Ki Seok LEE , Jay-Bok CHOI , Keun Nam KIM , Yong Seok AHN , Jin-Hwan CHUN , Sang Yeon HAN , Sung Hee HAN , Seung Uk HAN , Yoo Sang HWANG
IPC: H01L27/108 , H01L23/528
Abstract: A semiconductor device includes a device isolation layer defining first and second active regions, a buried contact connected to the second active region, and first and second bit line structures disposed on the first and second active regions. Each of the first and second bit line structures comprises a bit line contact part and a bit line pass part. The bit line contact part is electrically connected to the first active region. The bit line pass part is disposed on the device isolation layer. A height of a lowest part of the buried contact is smaller than a height of a lowest part of the bit line pass part. The height of the lowest part of the buried contact is greater than a height of a lowest part of the bit line contact part. A lower end of the bit line pass part is buried in the second active region.
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公开(公告)号:US20230022373A1
公开(公告)日:2023-01-26
申请号:US17657202
申请日:2022-03-30
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jong In KANG , Jun Young CHOI , Yoon Gi HONG , Tae Hoon KIM , Sung-Jin YEO , Sang Yeon HAN
IPC: H01L27/108
Abstract: A semiconductor device is provided. The semiconductor device includes a substrate which includes a cell region and a core region, a boundary element separation film which is placed inside the substrate, and separates the cell region and the core region, and a bit line which is placed on the cell region and the boundary element separation film and extends along a first direction, in which the boundary element separation film includes a first region and a second region, a height of an upper side of the first region of the boundary element separation film is different from a height of an upper side of the second region of the boundary element separation film, on a basis of a bottom side of the boundary element separation film, and the bit line is placed over the first region and the second region of the boundary element separation film.
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公开(公告)号:US20210098460A1
公开(公告)日:2021-04-01
申请号:US16860276
申请日:2020-04-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sang Ho LEE , Eun A KIM , Ki Seok LEE , Jay-Bok CHOI , Keun Nam KIM , Yong Seok AHN , Jin-Hwan CHUN , Sang Yeon HAN , Sung Hee HAN , Seung Uk HAN , Yoo Sang HWANG
IPC: H01L27/108 , H01L23/528
Abstract: A semiconductor device includes a device isolation layer defining first and second active regions, a buried contact connected to the second active region, and first and second bit line structures disposed on the first and second active regions. Each of the first and second bit line structures comprises a bit line contact part and a bit line pass part. The bit line contact part is electrically connected to the first active region. The bit line pass part is disposed on the device isolation layer. A height of a lowest part of the buried contact is smaller than a height of a lowest part of the bit line pass part. The height of the lowest part of the buried contact is greater than a height of a lowest part of the bit line contact part. A lower end of the bit line pass part is buried in the second active region.
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