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公开(公告)号:US20240268102A1
公开(公告)日:2024-08-08
申请号:US18471583
申请日:2023-09-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kiseok LEE , Seung-Bo KO , Jongmin KIM , Hui-Jung KIM , SangJae PARK , Taejin PARK , Chan-Sic YOON , Myeong-Dong LEE , Hongjun LEE , Minju KANG , Keunnam KIM
IPC: H10B12/00
CPC classification number: H10B12/485 , H10B12/482 , H10B12/488
Abstract: A semiconductor device includes first and second active patterns extending in a first direction and arranged in a second direction intersecting the first direction, each of the first and second active patterns including first and second edge portions spaced apart from each other in the first direction, a first storage node pad and a first storage node contact sequentially provided on the first edge portion of the first active pattern, and a second storage node pad and a second storage node contact sequentially provided on the second edge portion of the second active pattern. Each of the first and second storage node contacts includes a metal material.
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公开(公告)号:US20240268101A1
公开(公告)日:2024-08-08
申请号:US18471900
申请日:2023-09-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: SangJae PARK , Seung-Bo KO , Keunnam KIM , Jongmin KIM , Hui-Jung KIM , Taejin PARK , Chan-Sic YOON , Kiseok LEE , Myeong-Dong LEE , Hongjun LEE
IPC: H10B12/00
CPC classification number: H10B12/482 , H10B12/05 , H10B12/34 , H10B12/485 , H10B12/488
Abstract: A semiconductor device includes first and second active patterns extending in a first direction and being adjacent to each other in a second direction, the first and second active patterns, each of which includes first and second edges spaced apart from each other in the first direction, a first storage node pad and a first storage node contact sequentially provided on the first edge of the first active pattern, a second storage node pad and a second storage node contact sequentially provided on the second edge of the second active pattern, and a fence pattern between the first and the second storage node contacts. Bottom and top surfaces of the first storage node contact are located at first and second levels, respectively. In a third direction, a width of the fence pattern at the first level is less than a width of the fence pattern at the second level.
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公开(公告)号:US20210296431A1
公开(公告)日:2021-09-23
申请号:US17036731
申请日:2020-09-29
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yoonyoung CHOI , SangJae PARK , Dongkyun LEE
IPC: H01L49/02
Abstract: An integrated circuit device including a lower electrode on a substrate, the lower electrode including a first lower electrode portion extending in a first direction perpendicular to a top surface of the substrate and including a first main region and a first top region, and a second lower electrode portion extending in the first direction on the first lower electrode portion and including a second main region and a second top region; a first top supporting pattern surrounding at least a portion of a side wall of the first top region of the first lower electrode portion; and a second top supporting pattern surrounding at least a portion of a side wall of the second top region of the second lower electrode portion, and the second lower electrode portion includes a protrusion protruding outward to the second top supporting pattern.
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