公开(公告)号：US11031392B2

公开(公告)日：2021-06-08

申请号：US16703908

申请日：2019-12-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yongho Jeon ,  Sekoo Kang ,  Sungwoo Myung ,  Keunhee Bai

IPC: H01L27/088 ,  H01L29/49 ,  H01L29/423 ,  H01L29/51 ,  H01L29/66 ,  H01L29/06 ,  H01L29/786 ,  H01L27/092 ,  H01L21/8238 ,  H01L21/033 ,  H01L21/84 ,  H01L21/28 ,  H01L27/12

Abstract: An integrated circuit device includes a first fin-type active area and a second fin-type active area protruding from a substrate and extending in a first direction, an element isolation layer between the first and second fin-type active areas on the substrate, first semiconductor patterns being on a top surface of the first fin-type active area and having channel areas, second semiconductor patterns being on a top surface of the second fin-type active area and having channel areas, a first gate structure extending on the first fin-type active area in a second direction and including a first work function control layer surrounding the first semiconductor patterns and comprising a step portion on the element isolation layer, and a second gate structure extending on the second fin-type active area in the second direction and including a second work function control layer surrounding the second semiconductor patterns.

公开(公告)号：US20200312844A1

公开(公告)日：2020-10-01

申请号：US16703908

申请日：2019-12-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yongho Jeon ,  Sekoo Kang ,  Sungwoo Myung ,  Keunhee Bai

IPC: H01L27/088 ,  H01L29/423 ,  H01L29/49

Abstract: An integrated circuit device includes a first fin-type active area and a second fin-type active area protruding from a substrate and extending in a first direction, an element isolation layer between the first and second fin-type active areas on the substrate, first semiconductor patterns being on a top surface of the first fin-type active area and having channel areas, second semiconductor patterns being on a top surface of the second fin-type active area and having channel areas, a first gate structure extending on the first fin-type active area in a second direction and including a first work function control layer surrounding the first semiconductor patterns and comprising a step portion on the element isolation layer, and a second gate structure extending on the second fin-type active area in the second direction and including a second work function control layer surrounding the second semiconductor patterns.

公开(公告)号：US11769811B2

公开(公告)日：2023-09-26

申请号：US17548826

申请日：2021-12-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yongho Jeon ,  Sekoo Kang ,  Keunhee Bai ,  Dongseok Lee

IPC: H01L29/423 ,  H01L29/40

CPC classification number: H01L29/4236 ,  H01L29/401 ,  H01L29/42364

Abstract: A semiconductor device includes first and second gate structures respectively on first and second active regions and an insulating layer between the first and second active regions and a separation structure between a first end portion of the first gate structure and a second end portion of the second gate structure and extending into the insulating layer. The separation structure includes a lower portion, an intermediate portion, and an upper portion, a maximum width of the intermediate portion in the first direction is greater than a maximum width of the lower portion in the first direction, and the maximum width of the intermediate portion is greater than a maximum width of the upper portion in the first direction.

公开(公告)号：US11201224B2

公开(公告)日：2021-12-14

申请号：US16820302

申请日：2020-03-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yongho Jeon ,  Sekoo Kang ,  Keunhee Bai ,  Dongseok Lee

IPC: H01L29/423 ,  H01L29/40

Abstract: A semiconductor device includes first and second gate structures respectively on first and second active regions and an insulating layer between the first and second active regions and a separation structure between a first end portion of the first gate structure and a second end portion of the second gate structure and extending into the insulating layer. The separation structure includes a lower portion, an intermediate portion, and an upper portion, a maximum width of the intermediate portion in the first direction is greater than a maximum width of the lower portion in the first direction, and the maximum width of the intermediate portion is greater than a maximum width of the upper portion in the first direction.

公开(公告)号：US20230395674A1

公开(公告)日：2023-12-07

申请号：US18236823

申请日：2023-08-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yongho Jeon ,  Sekoo Kang ,  Keunhee Bai ,  Dongseok Lee

IPC: H01L29/423 ,  H01L29/40

CPC classification number: H01L29/4236 ,  H01L29/42364 ,  H01L29/401

Abstract: A semiconductor device includes first and second gate structures respectively on first and second active regions and an insulating layer between the first and second active regions and a separation structure between a first end portion of the first gate structure and a second end portion of the second gate structure and extending into the insulating layer. The separation structure includes a lower portion, an intermediate portion, and an upper portion, a maximum width of the intermediate portion in the first direction is greater than a maximum width of the lower portion in the first direction, and the maximum width of the intermediate portion is greater than a maximum width of the upper portion in the first direction.

公开(公告)号：US20200381526A1

公开(公告)日：2020-12-03

申请号：US16820302

申请日：2020-03-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yongho Jeon ,  Sekoo Kang ,  Keunhee Bai ,  Dongseok Lee

IPC: H01L29/423 ,  H01L29/40

Abstract: A semiconductor device including a gate structure and a separation structure is provided. The semiconductor device includes: first and second active regions; an insulating layer between the first and second active regions; a first gate structure on the first active region and the insulating layer, the first gate structure having a first end portion on the insulating layer; a second gate structure on the second active region and the insulating layer, the second gate structure having a second end portion facing the first end portion in a first direction, the second gate structure on the insulating layer; and a separation structure between the first end portion and the second end portion and extending into the insulating layer. The separation structure includes a lower portion, an intermediate portion, and an upper portion, a maximum width of the intermediate portion in the first direction is greater than a maximum width of the lower portion in the first direction, and the maximum width of the intermediate portion is greater than a maximum width of the upper portion in the first direction.

公开(公告)号：US12113112B2

公开(公告)日：2024-10-08

申请号：US18236823

申请日：2023-08-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yongho Jeon ,  Sekoo Kang ,  Keunhee Bai ,  Dongseok Lee

IPC: H01L29/423 ,  H01L29/40

CPC classification number: H01L29/4236 ,  H01L29/401 ,  H01L29/42364

Abstract: A semiconductor device includes first and second gate structures respectively on first and second active regions and an insulating layer between the first and second active regions and a separation structure between a first end portion of the first gate structure and a second end portion of the second gate structure and extending into the insulating layer. The separation structure includes a lower portion, an intermediate portion, and an upper portion, a maximum width of the intermediate portion in the first direction is greater than a maximum width of the lower portion in the first direction, and the maximum width of the intermediate portion is greater than a maximum width of the upper portion in the first direction.

公开(公告)号：US20220102516A1

公开(公告)日：2022-03-31

申请号：US17548826

申请日：2021-12-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yongho Jeon ,  Sekoo Kang ,  Keunhee Bai ,  Dongseok Lee

IPC: H01L29/423 ,  H01L29/40

Abstract: A semiconductor device includes first and second gate structures respectively on first and second active regions and an insulating layer between the first and second active regions and a separation structure between a first end portion of the first gate structure and a second end portion of the second gate structure and extending into the insulating layer. The separation structure includes a lower portion, an intermediate portion, and an upper portion, a maximum width of the intermediate portion in the first direction is greater than a maximum width of the lower portion in the first direction, and the maximum width of the intermediate portion is greater than a maximum width of the upper portion in the first direction.