公开(公告)号：US20250056838A1

公开(公告)日：2025-02-13

申请号：US18584688

申请日：2024-02-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seo Woo Nam ,  Heon Jong Shin ,  Jae Ran Jang

IPC: H01L29/417 ,  H01L23/522 ,  H01L23/528 ,  H01L29/06 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

Abstract: A semiconductor device comprises a back insulating pattern comprising a first region, and a second region and extending in a first direction, a plurality of sheet patterns disposed on the back insulating pattern, and extending in the first direction, a first source/drain pattern disposed on the first region of the back insulating pattern, and connected to the plurality of sheet patterns, a second source/drain pattern disposed on the second region of the back insulating pattern, and connected to the plurality of sheet patterns, a gate electrode extending in a second direction crossing the first direction, and surrounding the plurality of sheet patterns, a first back source/drain contact that extends into the first region of the back insulating pattern, and connected to the first source/drain pattern and a second back source/drain contact that extends into the second region of the back insulating pattern, and connected to the second source/drain pattern.

公开(公告)号：US11837548B2

公开(公告)日：2023-12-05

申请号：US17476985

申请日：2021-09-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seon Bae Kim ,  Seo Woo Nam

IPC: H01L23/522 ,  H01L21/768 ,  H01L23/532 ,  H01L21/3213 ,  H01L23/528

CPC classification number: H01L23/53295 ,  H01L21/3213 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/5283

Abstract: A semiconductor device includes a substrate, a first interlayer insulating layer disposed on the substrate, a first trench formed inside the first interlayer insulating layer, a contact plug disposed inside the first trench, a first wiring pattern disposed on the contact plug, a second wiring pattern which is disposed on the first interlayer insulating layer and spaced apart from the first wiring pattern in a horizontal direction, a second interlayer insulating layer which is disposed on the first interlayer insulating layer and surrounds each of side walls of the first wiring pattern and each of side walls of the second wiring pattern, and a first air gap formed on the contact plug inside the first trench.

公开(公告)号：US20240421090A1

公开(公告)日：2024-12-19

申请号：US18398370

申请日：2023-12-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seo Woo Nam ,  Eui Bok Lee

IPC: H01L23/535 ,  H01L21/768 ,  H01L23/532

Abstract: A semiconductor device includes a lower wiring structure, an upper interlayer insulating film on the lower wiring structure and including an upper wiring trench and an upper wiring structure in the upper wiring trench. The upper wiring structure includes an upper barrier structure, and an upper filling film on the upper barrier structure. The upper barrier structure includes side wall portions extending along side walls of the upper wiring trench, and a bottom portion extending along a bottom face of the upper wiring trench. The upper barrier structure includes an upper barrier film, and an upper liner film between the upper barrier film and the upper filling film. The side wall portions of the upper barrier structure include a two-dimensional material (2D material), and the bottom face of the upper barrier structure is free of the two-dimensional material.