公开(公告)号：US20240153815A1

公开(公告)日：2024-05-09

申请号：US18456561

申请日：2023-08-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyuhoon Choi ,  Seungseok Ha ,  Seokmyeong Kang ,  Seowoo Nam

IPC: H01L21/768 ,  H01L21/3105 ,  H01L21/311 ,  H01L21/321

CPC classification number: H01L21/76819 ,  H01L21/31053 ,  H01L21/31144 ,  H01L21/3212 ,  H01L21/7684

Abstract: A method of manufacturing a semiconductor device includes forming conductive patterns on which stopper layers are formed, respectively, on a substrate including a first region having a first pattern density and a second region having a second pattern density lower than the first pattern density, forming a first interlayer insulating layer on the conductive patterns, exposing at least a portion of the first interlayer insulating layer on the first region and forming a photoresist pattern on the second region, etching at least a portion of the first interlayer insulating layer on the first region, performing first polishing to expose upper surfaces of ones of the stopper layers on the first region, etching the ones of the stopper layers on the first region, forming a second interlayer insulating layer on the conductive patterns, and performing second polishing to expose upper surfaces of ones of the conductive patterns on the first region.