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    Methods of copying a page in a memory device and methods of managing pages in a memory system
    1.
    发明授权
    Methods of copying a page in a memory device and methods of managing pages in a memory system 有权
    在存储器装置中复制页面的方法和在存储器系统中管理页面的方法

    公开(公告)号：US09076514B2

    公开(公告)日：2015-07-07

    申请号：US14054784

    申请日：2013-10-15

    申请人： Samsung Electronics Co., Ltd.

    发明人： Seong-Young Seo

    IPC分类号： G11C7/10 ,  G11C7/12 ,  G11C7/22

    CPC分类号： G11C7/22 ,  G11C7/10 ,  G11C7/1048 ,  G11C7/1051 ,  G11C2207/2236

    摘要： A method of copying a page in a memory device having a plurality of memory blocks and a plurality of sets of bit lines is disclosed, wherein each of the plurality of memory blocks includes a plurality of pages, and each set of bit lines corresponds to a respective memory block, wherein first bit lines of a source memory block that includes a source page are respectively coupled to second bit lines of a target memory block that includes a target page. The method includes disconnecting between the first bit lines of the source memory block including a source page and from the second bit lines of a the target memory block including a target page; transferring data stored in the source page to the first bit lines of the source memory block; transferring the data from the first bit lines of the source memory block to the second bit lines of the target memory block; and writing the data transferred to the second bit lines of the target memory block into the target page.

    摘要翻译： 公开了一种在具有多个存储块和多组位线的存储器件中复制页面的方法，其中多个存储器块中的每一个包括多个页面，并且每组位线对应于 相应的存储块，其中包括源页的源存储器块的第一位线分别耦合到包括目标页的目标存储器块的第二位线。 该方法包括在包括源页的源存储块的第一位线与包括目标页的目标存储块的第二位线之间断开; 将存储在源页面中的数据传送到源存储器块的第一位线; 将数据从源存储器块的第一位线传送到目标存储器块的第二位线; 并将传送到目标存储器块的第二位线的数据写入目标页面。

    SEMICONDUCTOR MEMORY AND MEMORY SYSTEM INCLUDING THE SEMICONDUCTOR MEMORY
    2.
    发明申请
    SEMICONDUCTOR MEMORY AND MEMORY SYSTEM INCLUDING THE SEMICONDUCTOR MEMORY 有权
    半导体存储器和存储器系统，包括半导体存储器

    公开(公告)号：US20140241099A1

    公开(公告)日：2014-08-28

    申请号：US14100387

    申请日：2013-12-09

    申请人： Samsung Electronics Co., Ltd.

    发明人： Seong-Young Seo ,  Chul Woo Park

    IPC分类号： G11C8/12

    CPC分类号： G11C8/12 ,  G11C5/04 ,  G11C8/06

    摘要： A memory system is provided which includes multiple semiconductor memories having arrays of memory cells and a memory controller configured to provide an address in common to the multiple memories. First and second addresses corresponding to first and second rows of memory cells in first and second memories are selected according to the address in common. The first row and its adjacent rows in the first memory can all be different from the second row and its adjacent rows in the second semiconductor memory. Different conversion schemes can provide scramble information used to convert the address in common into the first and second addresses.

    摘要翻译： 提供了一种存储器系统，其包括具有存储器单元阵列的多个半导体存储器和被配置为向多个存储器提供公共地址的存储器控​​制器。 根据共同的地址选择与第一和第二存储器中的第一和第二行存储单元对应的第一和第二地址。 第一存储器中的第一行及其相邻行全部可以不同于第二半导体存储器中的第二行及其相邻行。 不同的转换方案可以提供用于将共同地址转换成第一和第二地址的加扰信息。

    Memory devices and memory systems having the same
    4.
    发明授权
    Memory devices and memory systems having the same 有权
    具有相同的存储器件和存储器系统

    公开(公告)号：US09519531B2

    公开(公告)日：2016-12-13

    申请号：US14054957

    申请日：2013-10-16

    申请人： Samsung Electronics Co., Ltd.

    发明人： Seong-Young Seo ,  Chul-Woo Park

    IPC分类号： G06F11/07 ,  G11C7/10

    CPC分类号： G06F11/073 ,  G06F11/076 ,  G11C7/1006 ,  G11C7/1063

    摘要： In one example embodiment, a memory device includes a cell array configured to receive data at an associated address in response to a write command. The memory device further includes a storage unit configured to receive the associated address and the data in response to the write command and output the data to the associated address of the cell array in response to a rewrite command. The memory device further includes a violation determining unit configured to determine violation data, count a number of the violation data and determine data written to the storage unit as the violation data if a storage duration of the written data is less than a write recovery time (tWR).

    摘要翻译： 在一个示例实施例中，存储器设备包括被配置为响应于写入命令在相关联的地址处接收数据的单元阵列。 存储装置还包括存储单元，其被配置为响应于写入命令接收相关联的地址和数据，并且响应于重写命令将数据输出到单元阵列的相关联的地址。 所述存储装置还包括违规判定部，其被配置为如果写入数据的存储持续时间小于写恢复时间，则确定违规数据，对违反数据的数量进行计数，并将写入所述存储单元的数据确定为所述违规数据 tWR）。

    Memory device and memory system having the same
    5.
    发明授权
    Memory device and memory system having the same 有权
    存储器件和存储器系统具有相同的功能

    公开(公告)号：US09449673B2

    公开(公告)日：2016-09-20

    申请号：US14053865

    申请日：2013-10-15

    申请人： Samsung Electronics Co., Ltd.

    发明人： Seong-Young Seo

    IPC分类号： G06F13/12 ,  G06F13/38 ,  G11C11/406 ,  G11C11/4076

    CPC分类号： G11C11/40622 ,  G11C11/40618 ,  G11C11/4076

    摘要： A memory device includes a memory cell array, a multi-purpose register (MPR) and a control unit. The memory cell array includes a plurality of memory blocks. The multi-purpose register (MPR) stores physical address information for each of the plurality of memory blocks. The control unit outputs the physical address information stored in the multi-purpose register in response to an MPR read command received from a memory controller.

    摘要翻译： 存储器件包括存储单元阵列，多用途寄存器（MPR）和控制单元。 存储单元阵列包括多个存储块。 多用途寄存器（MPR）存储多个存储块中的每一个的物理地址信息。 响应于从存储器控制器接收的MPR读取命令，控制单元输出存储在多用途寄存器中的物理地址信息。