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公开(公告)号：US20180267738A1
公开(公告)日：2018-09-20
申请号：US15978750
申请日：2018-05-14
发明人： Perry V. Lea , Glen E. Hush
CPC分类号： G06F3/0647 , G06F3/061 , G06F3/0625 , G06F3/0685 , G11C7/1006 , G11C7/1072 , G11C11/4076 , G11C11/4091 , G11C11/4097 , G11C2207/2236 , G11C2207/2245
摘要： The present disclosure includes apparatuses and methods for data movement. An example apparatus includes a memory device that includes a plurality of subarrays of memory cells and sensing circuitry coupled to the plurality of subarrays. The sensing circuitry includes a sense amplifier and a compute component. The memory device also includes a plurality of subarray controllers. Each subarray controller of the plurality of subarray controllers is coupled to a respective subarray of the plurality of subarrays and is configured to direct performance of an operation with respect to data stored in the respective subarray of the plurality of subarrays. The memory device is configured to move a data value corresponding to a result of an operation with respect to data stored in a first subarray of the plurality of subarrays to a memory cell in a second subarray of the plurality of subarrays.
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公开(公告)号：US09678832B2
公开(公告)日：2017-06-13
申请号：US14595939
申请日：2015-01-13
CPC分类号： G06F11/1068 , G06F3/0619 , G06F3/064 , G06F3/065 , G06F3/0673 , G06F11/073 , G06F11/076 , G06F11/079 , G06F11/1048 , G06F11/1076 , G11C7/1009 , G11C16/08 , G11C2029/0411 , G11C2207/2236
摘要： A storage module and method for on-chip copy gather are provided. In one embodiment, a storage module is provided with a memory comprising a plurality of word lines and a plurality of data latches. The memory copies data from a first word line into a first data latch and copies data from a second word line into a second data latch. The memory then copies only some of the data from the first data latch and only some of the data from the second data latch into a third data latch. After that, the memory copies the data from the third data latch to a third word line. In another embodiment, a storage module is provided comprising a memory and an on-chip copy gather module. Other embodiments are provided.
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公开(公告)号：US20170148500A1
公开(公告)日：2017-05-25
申请号：US15356681
申请日：2016-11-21
发明人： Chun Shiah , Yu-Hui Sung
IPC分类号： G11C11/4091 , G11C11/408 , G11C11/4096
CPC分类号： G11C11/4091 , G06F3/061 , G06F3/0644 , G06F3/065 , G06F3/0659 , G06F3/0673 , G06F12/0893 , G11C11/4076 , G11C11/4085 , G11C11/4087 , G11C11/4096 , G11C16/06 , G11C29/06 , G11C29/34 , G11C2207/2236
摘要： A memory circuit capable of being quickly written in data includes a plurality of banks, and each bank of the plurality of banks includes a plurality of segments. Each segment of the plurality of segments includes a plurality of bit line groups, and each bit line group of the plurality of bit line groups corresponds to a pre-charge line. When a predetermined signal is enabled, a potential is written into memory cells of the each segment corresponding to the each bit line group through the pre-charge line and the each bit line group.
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公开(公告)号：US09575759B2
公开(公告)日：2017-02-21
申请号：US14624596
申请日：2015-02-18
发明人： Sang-Yeun Cho
CPC分类号： G06F9/30141 , G06F12/00 , G06F12/0638 , G11C7/1006 , G11C2207/2236 , Y02D10/13
摘要： A memory system processing data according to a received first request may include a main memory and a memory controller. The main memory may comprise a first area and a second area, and may be configured to provide data from the first area to the second area. The memory controller may comprise a scoreboard configured to indicate that a first piece of sub-data of a first set of sub-data of the data has been provided from the first area to the second area. Based on the scoreboard, the memory controller may be configured to perform processing of the first request by using the first piece of sub-data before providing of other pieces of sub-data of the first set of sub-data from the first area to the second area is completed.
摘要翻译： 根据接收的第一请求处理数据的存储器系统可以包括主存储器和存储器控制器。 主存储器可以包括第一区域和第二区域，并且可以被配置为将数据从第一区域提供给第二区域。 存储器控制器可以包括记分板，其被配置为指示已经从第一区域到第二区域提供了数据的第一组子数据的第一子数据。 基于记分板，存储器控制器可以被配置为在从第一区域提供第一组子数据的其他子数据之前，通过使用第一子数据来执行第一请求的处理 第二区完成。
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公开(公告)号：US09208837B2
公开(公告)日：2015-12-08
申请号：US13975134
申请日：2013-08-23
发明人： Sei-Jin Kim , Sang-Ho Shin , Hee-Sub Shin
CPC分类号： G11C7/1072 , G06F3/0611 , G06F3/0646 , G06F3/0689 , G11C7/22 , G11C2207/2236
摘要： The present disclosure relates to an apparatus and method capable of carrying out data movement in a memory of a terminal. The apparatus includes a processor configured to transmit a command for data movement and address information for data movement in a memory to the memory, and the memory configured to perform the data movement in units of word line in the memory by using the address information, in response to reception of the command for moving the data.
摘要翻译： 本公开涉及能够在终端的存储器中执行数据移动的装置和方法。 该装置包括：处理器，被配置为向存储器发送用于数据移动的命令和用于数据移动的地址信息，以及被配置为通过使用地址信息以存储器中的字线为单位执行数据移动的处理器， 响应接收到用于移动数据的命令。
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6.发明授权Methods of copying a page in a memory device and methods of managing pages in a memory system 有权在存储器装置中复制页面的方法和在存储器系统中管理页面的方法公开(公告)号：US09076514B2
公开(公告)日：2015-07-07
申请号：US14054784
申请日：2013-10-15
发明人： Seong-Young Seo
CPC分类号： G11C7/22 , G11C7/10 , G11C7/1048 , G11C7/1051 , G11C2207/2236
摘要： A method of copying a page in a memory device having a plurality of memory blocks and a plurality of sets of bit lines is disclosed, wherein each of the plurality of memory blocks includes a plurality of pages, and each set of bit lines corresponds to a respective memory block, wherein first bit lines of a source memory block that includes a source page are respectively coupled to second bit lines of a target memory block that includes a target page. The method includes disconnecting between the first bit lines of the source memory block including a source page and from the second bit lines of a the target memory block including a target page; transferring data stored in the source page to the first bit lines of the source memory block; transferring the data from the first bit lines of the source memory block to the second bit lines of the target memory block; and writing the data transferred to the second bit lines of the target memory block into the target page.
摘要翻译： 公开了一种在具有多个存储块和多组位线的存储器件中复制页面的方法，其中多个存储器块中的每一个包括多个页面，并且每组位线对应于 相应的存储块，其中包括源页的源存储器块的第一位线分别耦合到包括目标页的目标存储器块的第二位线。 该方法包括在包括源页的源存储块的第一位线与包括目标页的目标存储块的第二位线之间断开; 将存储在源页面中的数据传送到源存储器块的第一位线; 将数据从源存储器块的第一位线传送到目标存储器块的第二位线; 并将传送到目标存储器块的第二位线的数据写入目标页面。
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公开(公告)号：US20140177347A1
公开(公告)日：2014-06-26
申请号：US13721315
申请日：2012-12-20
IPC分类号： G11C7/00
CPC分类号： G11C11/4076 , G11C2207/2236
摘要： A method and apparatus for inter-row data transfer in memory devices is described. Data transfer from one physical location in a memory device to another is achieved without engaging the external input/output pins on the memory device. In an example method, a memory device is responsive to a row transfer (RT) command which includes a source row identifier and a target row identifier. The memory device activates a source row and storing source row data in a row buffer, latches the target row identifier into the memory device, activates a word line of a target row to prepare for a write operation, and stores the source row data from the row buffer into the target row.
摘要翻译： 描述了存储器件中行间数据传输的方法和装置。 从存储设备中的一个物理位置到另一物理位置的数据传输是在不将外部输入/输出引脚接入存储器件的情况下实现的。 在示例性方法中，存储器设备响应于包括源行标识符和目标行标识符的行传送（RT）命令。 存储器件激活源行并且将源行数据存储在行缓冲器中，将目标行标识符锁存到存储器件中，激活目标行的字线以准备写入操作，并存储源行数据 行缓冲区到目标行。
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8.发明授权Methods of data management in non-volatile memory devices and related non-volatile memory systems 有权非易失性存储器件和相关非易失性存储器系统中的数据管理方法公开(公告)号：US08392662B2
公开(公告)日：2013-03-05
申请号：US12483001
申请日：2009-06-11
申请人： Jun-Ho Jang , Jin-Hwa Lee , Woon-Jae Chung , Sang-Hoon Choi , Nam-Hoon Kim
发明人： Jun-Ho Jang , Jin-Hwa Lee , Woon-Jae Chung , Sang-Hoon Choi , Nam-Hoon Kim
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F2212/7203 , G11C2207/2236 , G11C2211/5641
摘要： A data management method includes assigning data buffered in a first memory device into at least two different groups for transfer to a second memory device. At least one of the different groups has at least two units of the data assigned thereto. The data is transferred from the first memory device to the second memory device in a sequence according to a respective priority associated with each of the different groups and in group-by-group manner such that units of the data assigned to a group having a higher priority are transferred to the second memory device prior to units of the data assigned to a group having a lower priority. Related systems and methods are also discussed.
摘要翻译： 数据管理方法包括将缓冲在第一存储器设备中的数据分配到至少两个不同的组中以传送到第二存储器设备。 不同组中的至少一个具有分配给其的数据的至少两个单位。 数据按照与每个不同组相关联的相应优先级和按组分组的方式按顺序从第一存储器件传送到第二存储器件，使得分配给具有较高值的组的数据的单位 在分配给具有较低优先级的组的数据的单位之前，优先级被传送到第二存储器设备。 还讨论了相关系统和方法。
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9.发明授权Memory device, memory system and dual port memory device with self-copy function 有权内存设备，内存系统和具有自动复制功能的双端口存储设备公开(公告)号：US08122186B2
公开(公告)日：2012-02-21
申请号：US12515697
申请日：2007-11-21
申请人： Young-Hun Lim , Ji-Tae Ha , Ho-Jong Park
发明人： Young-Hun Lim , Ji-Tae Ha , Ho-Jong Park
IPC分类号： G06F13/00
CPC分类号： G11C7/22 , G11C2207/2236
摘要： A memory device with a self-copy function includes a memory cell array having first and second banks, and a memory interface. The memory interface reads data from a memory area of the first bank corresponding to a source address contained in previously set self-copy information and writes the read data to a memory area of the second bank corresponding to a destination address contained in the self-copy information via a self-copy data path when a self-copy signal is activated by an external self-copy start request.
摘要翻译： 具有自复制功能的存储器件包括具有第一和第二存储体的存储单元阵列和存储器接口。 存储器接口从对应于先前设置的自复制信息中包含的源地址的第一存储体的存储区读取数据，并将读取的数据写入对应于包含在自复制中的目的地地址的第二存储体的存储区域 当通过外部自复制开始请求激活自复制信号时，经由自复制数据路径的信息。
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公开(公告)号：US07379363B2
公开(公告)日：2008-05-27
申请号：US11692108
申请日：2007-03-27
申请人： Chang-Ting Chen
发明人： Chang-Ting Chen
IPC分类号： G11C7/00
CPC分类号： G11C7/22 , G11C2207/2236 , G11C2207/2245
摘要： Various methods and apparatuses permit high speed reads of memory. Portions of data are copied and stored on other word lines. By reading a copy of data that is stored on memory cells accessed by a word line that is already precharged, a latency specification can be met which does not allow time for precharging a second word line.
摘要翻译： 各种方法和装置允许高速读取存储器。 数据部分被复制并存储在其他字线上。 通过读取存储在已经被预充电的字线访问的存储器单元上的数据的副本，可以满足延迟规定，这不允许用于预充电第二字线的时间。
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