公开(公告)号：US09034700B1

公开(公告)日：2015-05-19

申请号：US14491044

申请日：2014-09-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yeong-Jong Jeong ,  Jeong-Yun Lee ,  Shi Ii Quan ,  Dong-Suk Shin ,  Si-Hyung Lee

IPC: H01L21/00 ,  H01L29/66 ,  H01L29/10

CPC classification number: H01L29/0847 ,  H01L21/823821 ,  H01L21/845 ,  H01L27/0886 ,  H01L27/092 ,  H01L27/0924 ,  H01L29/41758 ,  H01L29/66636 ,  H01L29/66795 ,  H01L29/66818 ,  H01L29/7848 ,  H01L29/7851

Abstract: Integrated circuit devices including Fin field effect transistors (finFETs) and methods of forming those devices are provided. The methods may include forming a fin on a substrate and forming a gate line on the fin. The method may also include forming a first recess in the fin having a first width and a first depth and forming a second recess in the first recess having a second width that is less than the first width and having a second depth that is greater than the first depth. The method may further include forming a source/drain region in the first and second recesses.

Abstract translation: 提供包括Fin场效应晶体管（finFET）的集成电路器件以及形成这些器件的方法。 所述方法可以包括在衬底上形成翅片并在翅片上形成栅极线。 该方法还可以包括在翅片中形成具有第一宽度和第一深度的第一凹部，并且在第一凹部中形成具有小于第一宽度的第二宽度的第二凹部，并且具有大于 第一深度 该方法还可以包括在第一和第二凹部中形成源极/漏极区域。

公开(公告)号：US20150132908A1

公开(公告)日：2015-05-14

申请号：US14294429

申请日：2014-06-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yeong-Jong Jeong ,  Jeong-Yun Lee ,  Shi Ii Quan ,  Sug-Hyun Sung

IPC: H01L29/66 ,  H01L21/02

CPC classification number: H01L29/66545 ,  H01L29/66795

Abstract: A semiconductor device and method of fabricating the device, includes forming a fin-type active pattern that projects above a field insulating layer and forming a dummy gate structure that includes an epitaxial growth prevention layer to suppress nodule formation.

Abstract translation: 一种制造该器件的半导体器件和方法，包括形成在场绝缘层上方突出的鳍状有源图案，并形成包含外延生长防止层的虚拟栅极结构，以抑制结核形成。