公开(公告)号：US08939784B2

公开(公告)日：2015-01-27

申请号：US13829081

申请日：2013-03-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangki Lee ,  Insik Kim ,  Teaseog Um ,  Suklae Kim ,  Yoonoh Han

IPC: H01R13/62 ,  H01R12/50 ,  G01R1/04

CPC classification number: H01R23/70 ,  G01R1/0466 ,  G01R1/0483

Abstract: A semiconductor chip package test socket may include a socket housing; a plurality of probe needles in the socket housing; a conductive pad on the probe needles; a floating guide configured to cover an edge of the conductive pad and configured to provide a semiconductor chip package on the conductive pad; and/or clamps fixed at the socket housing. The clamps may combine the floating guide with the socket housing.

Abstract translation: 半导体芯片封装测试插座可以包括插座壳体; 插座壳体中的多个探针; 探针上的导电垫; 浮动引导件，其构造成覆盖所述导电焊盘的边缘并且被配置为在所述导电焊盘上提供半导体芯片封装; 和/或固定在插座壳体上的夹具。 夹具可以将浮动导向件与插座壳体组合。

公开(公告)号：US11355497B2

公开(公告)日：2022-06-07

申请号：US17077257

申请日：2020-10-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yoonho Son ,  Suklae Kim ,  Sejin Park ,  Seungjoong Shin ,  Hyuewon Lee

IPC: H01L27/108 ,  H01L49/02

Abstract: A semiconductor device includes a memory cell storing data. The memory cell capacitor includes a plurality of bottom electrodes on a substrate and extending in a vertical direction with respect to a top surface of the substrate, the plurality of bottom electrodes being spaced apart from each other in a first direction parallel to the top surface of the substrate, an upper support pattern on upper lateral surfaces of the plurality of bottom electrodes, and a lower support pattern on lower lateral surfaces of the plurality of bottom electrodes. The lower support pattern is disposed between the substrate and the upper support pattern, and a first bottom electrode of the plurality of bottom electrodes includes a first recess adjacent to a bottom surface of the lower support pattern.

公开(公告)号：US11616118B2

公开(公告)日：2023-03-28

申请号：US16938286

申请日：2020-07-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seungjin Kim ,  Sungsoo Yim ,  Suklae Kim ,  Hyukwoo Kwon ,  Byunghyun Lee ,  Yoonyoung Choi

IPC: H01L49/02 ,  H01L27/108

Abstract: An integrated circuit semiconductor device includes a plurality of cylindrical structures separated from each other on a substrate; and a plurality of supporters having an opening region exposing side surfaces of the plurality of cylindrical structures, the plurality of supporters being in contact with the side surfaces of the plurality of cylindrical structures and supporting the plurality of cylindrical structures, wherein each of the plurality of supporters has both side surfaces having slopes and has a top width that is less than a bottom width.