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    Method of manufacturing semiconductor devices
    1.
    发明授权
    Method of manufacturing semiconductor devices 有权
    制造半导体器件的方法

    公开(公告)号：US09564343B2

    公开(公告)日：2017-02-07

    申请号：US14990353

    申请日：2016-01-07

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Mongsup Lee ,  Yoonho Son ,  Sang-Jun Lee ,  Munkwon Kang ,  Kyunghyun Kim ,  Inseak Hwang

    IPC: H01L21/302 ,  H01L21/461 ,  H01L21/311

    CPC classification number: H01L21/31116 ,  H01L21/02063 ,  H01L21/7682 ,  H01L27/10814 ,  H01L27/10823 ,  H01L27/10852 ,  H01L27/10876 ,  H01L27/10885 ,  H01L27/10888

    Abstract: A substrate having an insulating layer including an oxide is loaded into a chamber, and at least a part of the insulating layer is removed by injecting a process gas including an etching source gas into the chamber. The removal process is performed in a pulse type in which a first period and a second period are repeated a plurality of times. The etching source gas is supplied at a first flow rate during the first period and is supplied at a second flow rate less than the first flow rate during the second period. A temperature of the inside of the chamber remains at 100° C. or more during the removal process.

    Abstract translation: 具有包含氧化物的绝缘层的衬底被加载到腔室中，并且通过将包括蚀刻源气体的处理气体注入到室中来去除绝缘层的至少一部分。 去除处理以多次重复第一周期和第二周期的脉冲类型执行。 蚀刻源气体在第一时段期间以第一流量供应，并且在第二时段期间以小于第一流量的第二流量供应。 在除去过程中，室内温度保持在100℃或更高。

    Semiconductor device and method of fabricating the same
    2.
    发明授权
    Semiconductor device and method of fabricating the same 有权
    半导体装置及其制造方法

    公开(公告)号：US09496381B2

    公开(公告)日：2016-11-15

    申请号：US13716402

    申请日：2012-12-17

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Mongsup Lee ,  Yoonho Son ,  Woogwan Shim ,  Chan Min Lee ,  Inseak Hwang

    IPC: H01L29/78 ,  H01L27/108

    CPC classification number: H01L29/78 ,  H01L27/10876 ,  H01L27/10885 ,  H01L27/10888

    Abstract: A semiconductor device may include a substrate including an active pattern delimited by a device isolation pattern, a gate electrode crossing the active pattern, a first impurity region and a second impurity region in the active pattern on both sides of the gate electrode, a bit line crossing the gate electrode, a first contact electrically connecting the first impurity region with the bit line, and a first nitride pattern on a lower side surface of the first contact. A width of the first contact measured perpendicular to an extending direction of the bit line may be substantially equal to that of the bit line.

    Abstract translation: 半导体器件可以包括：衬底，其包括由器件隔离图案限定的有源图案，与有源图案交叉的栅极电极，栅电极两侧的有源图案中的第一杂质区域和第二杂质区域，位线 跨越栅电极，将第一杂质区与位线电连接的第一接触和第一接触的下侧表面上的第一氮化物图案。 垂直于位线的延伸方向测量的第一接触件的宽度可以基本上等于位线的宽度。

    Memory cell capacitor with varying width and supportive structures
    3.
    发明授权
    Memory cell capacitor with varying width and supportive structures 有权

    公开(公告)号：US11355497B2

    公开(公告)日：2022-06-07

    申请号：US17077257

    申请日：2020-10-22

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yoonho Son ,  Suklae Kim ,  Sejin Park ,  Seungjoong Shin ,  Hyuewon Lee

    IPC: H01L27/108 ,  H01L49/02

    Abstract: A semiconductor device includes a memory cell storing data. The memory cell capacitor includes a plurality of bottom electrodes on a substrate and extending in a vertical direction with respect to a top surface of the substrate, the plurality of bottom electrodes being spaced apart from each other in a first direction parallel to the top surface of the substrate, an upper support pattern on upper lateral surfaces of the plurality of bottom electrodes, and a lower support pattern on lower lateral surfaces of the plurality of bottom electrodes. The lower support pattern is disposed between the substrate and the upper support pattern, and a first bottom electrode of the plurality of bottom electrodes includes a first recess adjacent to a bottom surface of the lower support pattern.

    Method of Manufacturing Semiconductor Devices
    5.
    发明申请
    Method of Manufacturing Semiconductor Devices 有权
    制造半导体器件的方法

    公开(公告)号：US20160307773A1

    公开(公告)日：2016-10-20

    申请号：US14990353

    申请日：2016-01-07

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Mongsup Lee ,  Yoonho Son ,  Sang-Jun Lee ,  Munkwon Kang ,  Kyunghyun Kim ,  Inseak Hwang

    IPC: H01L21/311

    CPC classification number: H01L21/31116 ,  H01L21/02063 ,  H01L21/7682 ,  H01L27/10814 ,  H01L27/10823 ,  H01L27/10852 ,  H01L27/10876 ,  H01L27/10885 ,  H01L27/10888

    Abstract: A substrate having an insulating layer including an oxide is loaded into a chamber, and at least a part of the insulating layer is removed by injecting a process gas including an etching source gas into the chamber. The removal process is performed in a pulse type in which a first period and a second period are repeated a plurality of times. The etching source gas is supplied at a first flow rate during the first period and is supplied at a second flow rate less than the first flow rate during the second period. A temperature of the inside of the chamber remains at 100° C. or more during the removal process.

    Abstract translation: 具有包含氧化物的绝缘层的衬底被加载到腔室中，并且通过将包括蚀刻源气体的处理气体注入到室中来去除绝缘层的至少一部分。 去除处理以多次重复第一周期和第二周期的脉冲类型执行。 蚀刻源气体在第一时段期间以第一流量供应，并且在第二时段期间以小于第一流量的第二流量供应。 在除去过程中，室内温度保持在100℃或更高。

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