公开(公告)号：US11887840B2

公开(公告)日：2024-01-30

申请号：US17678392

申请日：2022-02-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Min Sung Kang ,  Hyoung Yol Mun ,  Jun U Jin ,  Bo Hyun Kim ,  Sung Dong Cho ,  Won Hee Cho

IPC: H01L23/00

CPC classification number: H01L24/13 ,  H01L24/02 ,  H01L2224/0239 ,  H01L2224/02311 ,  H01L2224/02381 ,  H01L2224/13111 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13166 ,  H01L2224/13171 ,  H01L2224/13172 ,  H01L2224/13184

Abstract: A semiconductor device includes a substrate. A conductive layer is disposed on the substrate and extends in a first direction. An insulating layer is disposed on the conductive layer and exposes at least a portion of the conductive layer through a via hole. The via hole includes a first face extending in a first slope relative to a top face of the conductive layer. A second face extends in a second slope relative to the top face of the conductive layer that is less than the first slope. A redistribution conductive layer includes a first pad area disposed in the via hole. A line area at least partially extends along the first face and the second face. The first face directly contacts the conductive layer. The second face is positioned at a higher level than the first face in a second direction perpendicular to a top face of the substrate.

公开(公告)号：US11705386B2

公开(公告)日：2023-07-18

申请号：US17651456

申请日：2022-02-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kwang Wuk Park ,  Sung Dong Cho ,  Eun Ji Kim ,  Hak Seung Lee ,  Dae Suk Lee ,  Dong Chan Lim ,  Sang Jun Park

IPC: H01L23/48 ,  H01L21/48

CPC classification number: H01L23/481 ,  H01L21/4814

Abstract: A semiconductor device includes a substrate, an interlayer insulating layer on the substrate, a first etch stop layer on the substrate, a first through-silicon-via (TSV) configured to pass vertically through the substrate and the interlayer insulating layer, and a second TSV configured to pass vertically through the substrate, the interlayer insulating layer, and the first etch stop layer, wherein the second TSV has a width greater than that of the first TSV.

公开(公告)号：US20200273780A1

公开(公告)日：2020-08-27

申请号：US16678620

申请日：2019-11-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kwang Wuk Park ,  Sung Dong Cho ,  Eun Ji Kim ,  Hak Seung Lee ,  Dae Suk Lee ,  Dong Chan Lim ,  Sang Jun Park

IPC: H01L23/48 ,  H01L21/48

Abstract: A semiconductor device includes a substrate, an interlayer insulating layer on the substrate, a first etch stop layer on the substrate, a first through-silicon-via (TSV) configured to pass vertically through the substrate and the interlayer insulating layer, and a second TSV configured to pass vertically through the substrate, the interlayer insulating layer, and the first etch stop layer, wherein the second TSV has a width greater than that of the first TSV.

公开(公告)号：US11289402B2

公开(公告)日：2022-03-29

申请号：US16678620

申请日：2019-11-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kwang Wuk Park ,  Sung Dong Cho ,  Eun Ji Kim ,  Hak Seung Lee ,  Dae Suk Lee ,  Dong Chan Lim ,  Sang Jun Park

IPC: H01L23/48 ,  H01L21/48

Abstract: A semiconductor device includes a substrate, an interlayer insulating layer on the substrate, a first etch stop layer on the substrate, a first through-silicon-via (TSV) configured to pass vertically through the substrate and the interlayer insulating layer, and a second TSV configured to pass vertically through the substrate, the interlayer insulating layer, and the first etch stop layer, wherein the second TSV has a width greater than that of the first TSV.