公开(公告)号：US20220157811A1

公开(公告)日：2022-05-19

申请号：US17380232

申请日：2021-07-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junggun YOU ,  Sung Gi HUR ,  Sungil PARK ,  Wooseok PARK ,  Seungmin SONG

IPC: H01L27/088 ,  H01L27/092 ,  H01L21/8238

Abstract: A semiconductor device including a substrate that includes first and second regions; a first active pattern on the first region, the first active pattern including first source/drain patterns and a first channel pattern between the first source/drain patterns; a second active pattern on the second region, the second active pattern including second source/drain patterns and a second channel pattern between the second source/drain patterns; and a first gate electrode on the first channel pattern and a second gate electrode on the second channel pattern, wherein a length of the first channel pattern is greater than a length of the second channel pattern, each of the first channel pattern and the second channel pattern includes a plurality of semiconductor patterns stacked on the substrate, and at least two semiconductor patterns of the first channel pattern are bent away from or toward a bottom surface of the substrate.

公开(公告)号：US20230112528A1

公开(公告)日：2023-04-13

申请号：US18046518

申请日：2022-10-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： MYUNG GIL KANG ,  Dong Won KIM ,  Woo Seok PARK ,  Keun Hwi CHO ,  Sung Gi HUR

IPC: H01L29/423 ,  H01L27/092 ,  H01L29/06 ,  H01L29/786

Abstract: Semiconductor devices include a first active pattern including a first lower pattern extending in a first direction and a first sheet pattern spaced apart from the first lower pattern; and a first gate electrode on the first lower pattern, the first gate electrode extending in a second direction different from the first direction and surrounding the first sheet pattern, wherein the first lower pattern includes a first sidewall and a second sidewall opposite to each other, each of the first sidewall of the first lower pattern and the second sidewall of the first lower pattern extends in the first direction, the first gate electrode overlaps the first sidewall of the first lower pattern in the second direction by a first depth, the first gate electrode overlaps the second sidewall of the first lower pattern in the second direction by a second depth, and the first depth is different from the second depth.

公开(公告)号：US20220328496A1

公开(公告)日：2022-10-13

申请号：US17541790

申请日：2021-12-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Myung Gil KANG ,  Seunghun LEE ,  Sangdeok KWON ,  Keun Hwi CHO ,  Sung Gi HUR

IPC: H01L27/11 ,  H01L29/423 ,  H01L29/786

Abstract: A semiconductor device includes a first active pattern on a substrate, a pair of first source/drain patterns on the first active pattern and a first channel pattern between the pair of first source/drain patterns, wherein the first channel pattern includes a plurality of semiconductor patterns that are stacked and spaced apart from each other, a first gate electrode on the first channel pattern, a first gate cutting pattern that is adjacent to the first channel pattern and penetrates the first gate electrode, and a first residual pattern between the first gate cutting pattern and the first channel pattern. The first residual pattern covers an outermost sidewall of at least one semiconductor pattern of the plurality of semiconductor patterns of the first channel pattern. The first gate electrode includes, on an upper portion of the first gate electrode, a first extension that vertically overlaps the first residual pattern.