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公开(公告)号:US20250040215A1
公开(公告)日:2025-01-30
申请号:US18439634
申请日:2024-02-12
Applicant: SAMSUNG ELECTRONICS CO, LTD.
Inventor: Dong Hoon HWANG , Hyo Jin KIM , Myung II KANG , Tae Hyun RYU , Kyu Nam PARK , Woo Seok PARK
IPC: H01L29/66 , H01L21/8234 , H01L27/088 , H01L29/06 , H01L29/08 , H01L29/423 , H01L29/775 , H01L29/786
Abstract: A semiconductor device includes a lower pattern. A channel isolation structure and a field insulating layer contact the lower pattern. A gate structure is on the lower pattern, in contact with the channel isolation structure. A channel pattern is on the lower pattern, and includes sheet patterns, each being in contact with the channel isolation structure. A source/drain pattern contacts the channel pattern and the channel isolation structure. The channel isolation structure includes a first region contacting the gate structure and a second region contacting the source/drain pattern. The second region of the channel isolation structure includes portions whose widths increase as a distance from a bottom surface of the field insulating layer increases. A width of an uppermost portion of the channel isolation structure is greater than a width of a lowermost portion of the channel isolation structure
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公开(公告)号:US20230112528A1
公开(公告)日:2023-04-13
申请号:US18046518
申请日:2022-10-14
Applicant: Samsung Electronics Co., Ltd.
Inventor: MYUNG GIL KANG , Dong Won KIM , Woo Seok PARK , Keun Hwi CHO , Sung Gi HUR
IPC: H01L29/423 , H01L27/092 , H01L29/06 , H01L29/786
Abstract: Semiconductor devices include a first active pattern including a first lower pattern extending in a first direction and a first sheet pattern spaced apart from the first lower pattern; and a first gate electrode on the first lower pattern, the first gate electrode extending in a second direction different from the first direction and surrounding the first sheet pattern, wherein the first lower pattern includes a first sidewall and a second sidewall opposite to each other, each of the first sidewall of the first lower pattern and the second sidewall of the first lower pattern extends in the first direction, the first gate electrode overlaps the first sidewall of the first lower pattern in the second direction by a first depth, the first gate electrode overlaps the second sidewall of the first lower pattern in the second direction by a second depth, and the first depth is different from the second depth.
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公开(公告)号:US20220310852A1
公开(公告)日:2022-09-29
申请号:US17840737
申请日:2022-06-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jung Gil Yang , Woo Seok PARK , Dong Chan SUH , Seung Min SONG , Geum Jong BAE , Dong Il BAE
IPC: H01L29/786 , H01L29/423 , H01L29/10 , H01L29/161 , H01L29/08 , H01L29/66 , H01L29/775 , B82Y10/00 , H01L29/06
Abstract: A semiconductor device includes a substrate, a plurality of channel layers stacked on the substrate, a gate electrode surrounding the plurality of channel layers, and embedded source/drain layers on opposing sides of the gate electrode. The embedded source/drain layers each have a first region and a second region on the first region. The second region has a plurality of layers having different compositions.
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公开(公告)号:US20190088789A1
公开(公告)日:2019-03-21
申请号:US16161765
申请日:2018-10-16
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Seung Min SONG , Woo Seok PARK , Geum Jong BAE , Dong Il BAE , Jung Gil YANG
IPC: H01L29/786 , H01L29/66 , H01L29/06 , H01L21/02 , H01L29/423
Abstract: A semiconductor device includes a substrate; protruding portions extending in parallel to each other on the substrate; nanowires provided on the protruding portions and separated from each other; gate electrodes provided on the substrate and surrounding the nanowires; source/drain regions provided on the protruding portions and sides of each of the gate electrodes, the source/drain regions being in contact with the nanowires; and first voids provided between the source/drain regions and the protruding portions.
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公开(公告)号:US20190115424A1
公开(公告)日:2019-04-18
申请号:US15964170
申请日:2018-04-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Woo Seok PARK , Seung Min SONG , Jung Gil YANG , Geum Jong BAE , Dong Il BAE
IPC: H01L29/06 , H01L29/417 , H01L29/66 , H01L29/78
Abstract: A semiconductor device including a transistor disposed on a first region of a substrate, the transistor including source/drain regions, a plurality of channel layers spaced apart from each other in a direction perpendicular to an upper surface of the substrate while connecting the source/drain regions, respectively, a gate electrode surrounding each of the plurality of channel layers, and a gate insulator between the gate electrode and the plurality of channel layers; and a non-active component disposed on a second region of the substrate, the non-active component including a fin structure including an a plurality of first semiconductor patterns alternately stacked with a plurality of second semiconductor patterns, an epitaxial region adjacent to the fin structure, a non-active electrode intersecting the fin structure, and a blocking insulation film between the non-active electrode and the fin structure.
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公开(公告)号:US20190067490A1
公开(公告)日:2019-02-28
申请号:US15900175
申请日:2018-02-20
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jung Gil Yang , Woo Seok PARK , Dong Chan SUH , Seung Min SONG , Geum Jong BAE , Dong II BAE
IPC: H01L29/786 , H01L29/423 , H01L29/08 , H01L29/161 , H01L29/10
Abstract: A semiconductor device includes a substrate, a plurality of channel layers stacked on the substrate, a gate electrode surrounding the plurality of channel layers, and embedded source/drain layers on opposing sides of the gate electrode. The embedded source/drain layers each have a first region and a second region on the first region. The second region has a plurality of layers having different compositions.
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公开(公告)号:US20180190829A1
公开(公告)日:2018-07-05
申请号:US15647903
申请日:2017-07-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Seung Min SONG , Woo Seok PARK , Geum Jong BAE , Dong Il BAE , Jung Gil YANG
IPC: H01L29/786 , H01L29/06 , H01L29/423 , H01L29/66 , H01L21/02
CPC classification number: H01L29/78618 , H01L21/02532 , H01L21/02603 , H01L29/0673 , H01L29/42392 , H01L29/66545 , H01L29/66742 , H01L29/78696
Abstract: A semiconductor device includes a substrate; protruding portions extending in parallel to each other on the substrate; nanowires provided on the protruding portions and separated from each other; gate electrodes provided on the substrate and surrounding the nanowires; source/drain regions provided on the protruding portions and sides of each of the gate electrodes, the source/drain regions being in contact with the nanowires; and first voids provided between the source/drain regions and the protruding portions.
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