公开(公告)号：US11256389B2

公开(公告)日：2022-02-22

申请号：US16460283

申请日：2019-07-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki-Hyuck Shin ,  Sung-Hwan Kim ,  Doo-Hwan Kim ,  Jae-Yeol Lee ,  Kun-Woo Baek ,  Hee-Ran Youn

IPC: G06F3/0481 ,  G06F3/0482 ,  G06F3/04817 ,  G06F3/0487 ,  H04L65/403

Abstract: A display device for executing a plurality of applications and a method for controlling the display device are provided. The method includes displaying a plurality of windows in which applications are executed respectively, receiving an iconize input for executing the plurality of windows, checking window information about each of the plurality of windows and discontinuing the displaying of the plurality of windows, and generating a shortcut icon for executing the plurality of windows simultaneously, based on the checked window information.

公开(公告)号：US10386992B2

公开(公告)日：2019-08-20

申请号：US14096568

申请日：2013-12-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki-Hyuck Shin ,  Sung-Hwan Kim ,  Doo-Hwan Kim ,  Jae-Yeol Lee ,  Kun-Woo Baek ,  Hee-Ran Youn

IPC: G06F3/048 ,  G06F3/0482 ,  G06F3/0481 ,  G06F3/0487 ,  H04L29/06

Abstract: A display device for executing a plurality of applications and a method for controlling the display device are provided. The method includes displaying a plurality of windows in which applications are executed respectively, receiving an iconize input for executing the plurality of windows, checking window information about each of the plurality of windows and discontinuing the displaying of the plurality of windows, and generating a shortcut icon for executing the plurality of windows simultaneously, based on the checked window information.

公开(公告)号：US20130224925A1

公开(公告)日：2013-08-29

申请号：US13854322

申请日：2013-04-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chang-Woo Oh ,  Dong-Gun Park ,  Dong-Won Kim ,  Ming Li ,  Sung-Hwan Kim

IPC: H01L29/66 ,  H01L21/762

CPC classification number: H01L29/66833 ,  H01L21/76224 ,  H01L21/84 ,  H01L27/12 ,  H01L29/66795 ,  H01L29/785

Abstract: Semiconductor devices include a semiconductor substrate with a stack structure protruding from the semiconductor substrate and surrounded by an isolation structure. The stack structure includes an active layer pattern and a gap-filling insulation layer between the semiconductor substrate and the active layer pattern. A gate electrode extends from the isolation structure around the stack structure. The gate electrode is configured to provide a support structure for the active layer pattern. The gate electrode may be a gate electrode of a silicon on insulator (SOI) device formed on the semiconductor wafer and the semiconductor device may further include a bulk silicon device formed on the semiconductor substrate in a region of the semiconductor substrate not including the gap-filing insulation layer.

Abstract translation: 半导体器件包括具有从半导体衬底突出并被隔离结构包围的堆叠结构的半导体衬底。 堆叠结构包括半导体衬底和有源层图案之间的有源层图案和间隙填充绝缘层。 栅电极围绕堆叠结构从隔离结构延伸。 栅电极被配置为提供用于有源层图案的支撑结构。 栅电极可以是形成在半导体晶片上的绝缘体上硅（SOI）器件的栅电极，并且半导体器件还可以包括在半导体衬底的形成在半导体衬底上的体积硅器件， 保护层。

公开(公告)号：US09484203B2

公开(公告)日：2016-11-01

申请号：US14535437

申请日：2014-11-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jun-Hee Lim ,  Ki-Jae Hur ,  Sung-Hwan Kim ,  Hae-In Jung ,  Soo-Jin Hong

IPC: H01L21/336 ,  H01L21/8234 ,  H01L21/265 ,  H01L21/324 ,  H01L29/423 ,  H01L29/78 ,  H01L29/66

CPC classification number: H01L21/26506 ,  H01L21/324 ,  H01L29/4236 ,  H01L29/6656 ,  H01L29/66575 ,  H01L29/78

Abstract: In a method of manufacturing a semiconductor device, a gate structure is formed on a substrate. An ion implantation process is performed at an upper portion of the substrate exposed by the gate structure, so that an ion implantation region is formed to have an expanded volume. The ion implantation process uses ions that are identical to a material of the substrate.

Abstract translation: 在制造半导体器件的方法中，在衬底上形成栅极结构。 在由栅极结构暴露的衬底的上部进行离子注入工艺，使得形成离子注入区域以具有膨胀的体积。 离子注入工艺使用与衬底材料相同的离子。

公开(公告)号：US08815702B2

公开(公告)日：2014-08-26

申请号：US13854322

申请日：2013-04-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chang-Woo Oh ,  Dong-Gun Park ,  Dong-Won Kim ,  Ming Li ,  Sung-Hwan Kim

IPC: H01L21/76 ,  H01L29/66 ,  H01L29/78 ,  H01L27/12 ,  H01L21/84 ,  H01L21/762

CPC classification number: H01L29/66833 ,  H01L21/76224 ,  H01L21/84 ,  H01L27/12 ,  H01L29/66795 ,  H01L29/785

Abstract: Semiconductor devices include a semiconductor substrate with a stack structure protruding from the semiconductor substrate and surrounded by an isolation structure. The stack structure includes an active layer pattern and a gap-filling insulation layer between the semiconductor substrate and the active layer pattern. A gate electrode extends from the isolation structure around the stack structure. The gate electrode is configured to provide a support structure for the active layer pattern. The gate electrode may be a gate electrode of a silicon on insulator (SOI) device formed on the semiconductor wafer and the semiconductor device may further include a bulk silicon device formed on the semiconductor substrate in a region of the semiconductor substrate not including the gap-filing insulation layer.

Abstract translation: 半导体器件包括具有从半导体衬底突出并被隔离结构包围的堆叠结构的半导体衬底。 堆叠结构包括半导体衬底和有源层图案之间的有源层图案和间隙填充绝缘层。 栅电极围绕堆叠结构从隔离结构延伸。 栅电极被配置为提供用于有源层图案的支撑结构。 栅电极可以是形成在半导体晶片上的绝缘体上硅（SOI）器件的栅电极，并且半导体器件还可以包括在半导体衬底的形成在半导体衬底上的体积硅器件， 保护层。