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公开(公告)号:US11515390B2
公开(公告)日:2022-11-29
申请号:US16993514
申请日:2020-08-14
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jung-Han Lee , Jae-Hwan Lee , Sang-Su Kim , Hwan-Wook Choi , Tae-Jong Lee , Seung-Mo Ha
IPC: H01L29/06 , H01L27/088 , H01L21/8234
Abstract: A semiconductor device includes a plurality of active fins defined by an isolation layer on a substrate, a gate structure on the active fins and the isolation layer, and a gate spacer structure covering a sidewall of the gate structure. A sidewall of the gate structure includes first, second, and third regions having first, second, and third slopes, respectively. The second slope increases from a bottom toward a top of the second region. The second slope has a value at the bottom of the second region less than the first slope. The third slope is greater than the second slope.
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公开(公告)号:US10770467B2
公开(公告)日:2020-09-08
申请号:US16196197
申请日:2018-11-20
Applicant: Samsung Electronics Co., Ltd.
Inventor: Soo-Yeon Jeong , Dong-Gu Yi , Tae-Jong Lee , Jae-Po Lim
IPC: H01L27/11 , H01L27/088 , H01L29/40 , H01L29/08 , H01L29/66 , H01L29/78 , H01L21/8238 , H01L27/092 , H01L21/8234
Abstract: Provided are a semiconductor device and a method for fabricating the same. The semiconductor device comprises a first fin type active pattern formed on a substrate and extending in a first direction and including first to third parts. At least one dimension of the third part measuring less than the corresponding dimension of the first part. A gate electrode extending in a second direction different from the first direction is at least partially formed on the first part of the fin type active pattern. A first source/drain is formed on the third part of the fin type active pattern.
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公开(公告)号:US11610966B2
公开(公告)日:2023-03-21
申请号:US16694031
申请日:2019-11-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jung-Han Lee , Jae-Hwan Lee , Sang-Su Kim , Hwan-Wook Choi , Tae-Jong Lee , Seung-Mo Ha
IPC: H01L29/06 , H01L27/088 , H01L21/8234
Abstract: A semiconductor device includes a plurality of active fins defined by an isolation layer on a substrate, a gate structure on the active fins and the isolation layer, and a gate spacer structure covering a sidewall of the gate structure. A sidewall of the gate structure includes first, second, and third regions having first, second, and third slopes, respectively. The second slope increases from a bottom toward a top of the second region. The second slope has a value at the bottom of the second region less than the first slope. The third slope is greater than the second slope.
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公开(公告)号:US20190088662A1
公开(公告)日:2019-03-21
申请号:US16196197
申请日:2018-11-20
Applicant: Samsung Electronics Co., Ltd.
Inventor: Soo-Yeon Jeong , Dong-Gu Yi , Tae-Jong Lee , Jae-Po Lim
IPC: H01L27/11 , H01L29/66 , H01L29/40 , H01L27/088 , H01L21/8238 , H01L27/092 , H01L29/08 , H01L29/78 , H01L21/8234
CPC classification number: H01L27/1104 , H01L21/823418 , H01L21/823431 , H01L21/823814 , H01L21/823821 , H01L21/823828 , H01L27/0886 , H01L27/0924 , H01L27/1116 , H01L29/0847 , H01L29/408 , H01L29/66545 , H01L29/66636 , H01L29/66795 , H01L29/7848 , H01L29/785
Abstract: Provided are a semiconductor device and a method for fabricating the same. The semiconductor device comprises a first fin type active pattern formed on a substrate and extending in a first direction and including first to third parts. At least one dimension of the third part measuring less than the corresponding dimension of the first part. A gate electrode extending in a second direction different from the first direction is at least partially formed on the first part of the fin type active pattern. A first source/drain is formed on the third part of the fin type active pattern.
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公开(公告)号:US20170053921A1
公开(公告)日:2017-02-23
申请号:US15344834
申请日:2016-11-07
Applicant: Samsung Electronics Co., Ltd.
Inventor: Soo-Yeon Jeong , Dong-Gu Yi , Tae-Jong Lee , Jae-Po Lim
IPC: H01L27/11 , H01L29/66 , H01L21/8238 , H01L29/08 , H01L27/092
CPC classification number: H01L27/1104 , H01L21/823418 , H01L21/823431 , H01L21/823814 , H01L21/823821 , H01L21/823828 , H01L27/0886 , H01L27/0924 , H01L27/1116 , H01L29/0847 , H01L29/408 , H01L29/66545 , H01L29/66636 , H01L29/7848
Abstract: Provided are a semiconductor device and a method for fabricating the same. The semiconductor device comprises a first fin type active pattern formed on a substrate and extending in a first direction and including first to third parts. At least one dimension of the third part measuring less than the corresponding dimension of the first part. A gate electrode extending in a second direction different from the first direction is at least partially formed on the first part of the fin type active pattern. A first source/drain is formed on the third part of the fin type active pattern.
Abstract translation: 提供一种半导体器件及其制造方法。 半导体器件包括形成在衬底上并沿第一方向延伸并包括第一至第三部分的第一鳍式有源图案。 第三部分的至少一个尺寸小于第一部分的对应尺寸。 至少部分地在翅片式有源图案的第一部分上形成沿与第一方向不同的第二方向延伸的栅电极。 第一源极/漏极形成在鳍式有源图案的第三部分上。
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公开(公告)号:US10074717B2
公开(公告)日:2018-09-11
申请号:US14993212
申请日:2016-01-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jung-Han Lee , Jae-Hwan Lee , Sang-Su Kim , Hwan-Wook Choi , Tae-Jong Lee , Seung-Mo Ha
IPC: H01L29/49 , H01L29/06 , H01L27/088 , H01L21/8234
CPC classification number: H01L29/0657 , H01L21/823431 , H01L21/823468 , H01L27/0886
Abstract: A semiconductor device includes a plurality of active fins defined by an isolation layer on a substrate, a gate structure on the active fins and the isolation layer, and a gate spacer structure covering a sidewall of the gate structure. A sidewall of the gate structure includes first, second, and third regions having first, second, and third slopes, respectively. The second slope increases from a bottom toward a top of the second region. The second slope has a value at the bottom of the second region less than the first slope. The third slope is greater than the second slope.
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公开(公告)号:US11061052B2
公开(公告)日:2021-07-13
申请号:US16368493
申请日:2019-03-28
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sung-Hoon Lee , Byoung-Joo Kim , Mi-Rye Lee , Hwang-Jin Yeo , Tae-Jong Lee
Abstract: A probe includes a probe body for providing an object with a test signal; a tip arranged on an end of the probe body to make contact with the object; and an alignment key protruded from a side of the probe body.
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公开(公告)号:US20190019864A1
公开(公告)日:2019-01-17
申请号:US16124521
申请日:2018-09-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jung-Han Lee , Jae-Hwan Lee , Sang-Su Kim , Hwan-Wook Choi , Tae-Jong Lee , Seung-Mo Ha
IPC: H01L29/06 , H01L21/8234 , H01L27/088
Abstract: A semiconductor device includes a plurality of active fins defined by an isolation layer on a substrate, a gate structure on the active fins and the isolation layer, and a gate spacer structure covering a sidewall of the gate structure. A sidewall of the gate structure includes first, second, and third regions having first, second, and third slopes, respectively. The second slope increases from a bottom toward a top of the second region. The second slope has a value at the bottom of the second region less than the first slope. The third slope is greater than the second slope.
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公开(公告)号:US10163913B2
公开(公告)日:2018-12-25
申请号:US15344834
申请日:2016-11-07
Applicant: Samsung Electronics Co., Ltd.
Inventor: Soo-Yeon Jeong , Dong-Gu Yi , Tae-Jong Lee , Jae-Po Lim
IPC: H01L27/088 , H01L27/11 , H01L29/40 , H01L29/08 , H01L21/8238 , H01L27/092 , H01L29/66 , H01L21/8234
Abstract: Provided are a semiconductor device and a method for fabricating the same. The semiconductor device comprises a first fin type active pattern formed on a substrate and extending in a first direction and including first to third parts. At least one dimension of the third part measuring less than the corresponding dimension of the first part. A gate electrode extending in a second direction different from the first direction is at least partially formed on the first part of the fin type active pattern. A first source/drain is formed on the third part of the fin type active pattern.
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公开(公告)号:US11271110B2
公开(公告)日:2022-03-08
申请号:US16693439
申请日:2019-11-25
Applicant: Samsung Electronics Co., Ltd.
Inventor: Tae-Jong Lee , Sanghyuk Hong , TaeYong Kwon , Sunjung Kim , Cheol Kim
IPC: H01L29/78 , H01L29/08 , H01L29/161 , H01L29/16 , H01L29/165 , H01L29/66 , H01L21/8238
Abstract: Semiconductor devices and methods of fabricating the same are provided. The methods of fabricating the semiconductor devices may include providing a substrate including an active pattern protruding from the substrate, forming a first liner layer and a field isolating pattern on the substrate to cover a lower portion of the active pattern, forming a second liner layer on an upper portion of the active pattern and the field isolation pattern, and forming a dummy gate on the second liner layer.
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