System and method using a rate split scheme based on cooperation between receivers
    2.
    发明授权
    System and method using a rate split scheme based on cooperation between receivers 有权
    基于接收机之间协作的速率分割方案的系统和方法

    公开(公告)号:US08971945B2

    公开(公告)日:2015-03-03

    申请号:US13783522

    申请日:2013-03-04

    CPC classification number: H04W72/0446 H04W52/243 H04W52/40

    Abstract: Each of a first transmitter and a second transmitter uses a rate split scheme. Each of the first transmitter and the second transmitter may transmit at least four sub-messages, and different transmission powers may be allocated to the at least four sub-messages. Also, each of receivers may cooperate with each other, may share sub-messages that act as interferences, and may extract desired messages using the shared sub-messages.

    Abstract translation: 第一发射机和第二发射机中的每一个使用速率分离方案。 第一发射机和第二发射机中的每一个可以发送至少四个子消息,并且可以将不同的发射功率分配给至少四个子消息。 此外,每个接收机可以彼此协作,可以共享用作干扰的子消息,并且可以使用共享子消息来提取期望的消息。

    Method of controlling interference in multi-hop network based on MIMO system and relay node and node pair using the method
    4.
    发明授权
    Method of controlling interference in multi-hop network based on MIMO system and relay node and node pair using the method 有权
    基于MIMO系统和中继节点和节点对的多跳网络干扰控制方法

    公开(公告)号:US09531449B2

    公开(公告)日:2016-12-27

    申请号:US14293348

    申请日:2014-06-02

    CPC classification number: H04B7/026 H04B7/15592

    Abstract: A method of controlling interference of relay nodes and node pairs in a multi-hop network, includes relaying signals received from source nodes among the node pairs to destination nodes pairing with the source nodes, and cancelling a part of interference signals between the node pairs by controlling channel coefficients of the relay nodes. The destination nodes are configured to cancel residual interference signals among the interference signals, using the signals received by the destination nodes.

    Abstract translation: 一种控制多跳网络中的中继节点和节点对的干扰的方法,包括将从节点对中的源节点接收的信号中继到与源节点配对的目的节点,以及通过以下方式消除节点对之间的一部分干扰信号: 控制中继节点的信道系数。 目的地节点被配置为使用目的地节点接收的信号来消除干扰信号之间的残余干扰信号。

    Memory device including power-up control circuit, and memory system having the same
    5.
    发明授权
    Memory device including power-up control circuit, and memory system having the same 有权
    包括上电控制电路的存储器件和具有相同功能的存储器系统

    公开(公告)号:US09455018B2

    公开(公告)日:2016-09-27

    申请号:US14837294

    申请日:2015-08-27

    Abstract: A memory device may include a power-up control circuit and a first set of boost voltage generators. The power-up control circuit may be configured to consecutively activate a first set of power-up signals with a first delay time between each power-up signal of the first set of power-up signals in response to a rise of a power supply voltage and a reset signal having a first logic level at an initial stage of power-up. The first set of boost voltage generators may be configured to generate an internal boost voltage based on an external boost voltage and the first set of power-up signals. The first set of boost voltage generators may be configured to activate before the reset signal transitions from the first logic level to a second logic level opposite to the first logic level.

    Abstract translation: 存储器件可以包括上电控制电路和第一组升压电压发生器。 上电控制电路可以被配置为响应于电源电压的上升,以第一组加电信号的每个上电信号之间的第一延迟时间连续激活第一组上电信号 以及在上电初始阶段具有第一逻辑电平的复位信号。 第一组升压电压发生器可以被配置为基于外部升压电压和第一组上电信号产生内部升压电压。 第一组升压电压发生器可以被配置为在复位信号从第一逻辑电平转变到与第一逻辑电平相反的第二逻辑电平之前激活。

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