公开(公告)号：US20250126861A1

公开(公告)日：2025-04-17

申请号：US18745312

申请日：2024-06-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Wooseok PARK ,  Donghoon HWANG ,  Myungil KANG ,  Wookhwan SONG ,  Doyoung CHOI

IPC: H01L29/08 ,  H01L29/06 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

Abstract: A semiconductor device includes: a substrate; an active region extending in a first direction on the substrate; a gate structure extending in a second direction on the active region and intersecting the active region; a source/drain region on the active region on a side of the gate structure; a separation pattern extending in the first direction and separating the gate structure; and a contact structure on the separation pattern and crossing the separation pattern, the contact structure being electrically connected to the source/drain region, wherein the contact structure includes a first portion and a second portion, the first portion contacts the separation pattern, the second portion contacts the source/drain region, a lower surface of the second portion is at a level lower than a lower surface of the first portion, and a lowermost end of the contact structure is spaced apart from the separation pattern.

公开(公告)号：US20250072066A1

公开(公告)日：2025-02-27

申请号：US18412812

申请日：2024-01-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Wooseok PARK ,  Wookhwan SONG ,  Donghoon HWANG ,  Myungil KANG ,  Taehyun RYU ,  Namhyun LEE

IPC: H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

Abstract: A semiconductor device may include a first active pattern, a second active pattern spaced apart at a first distance from the first active pattern, a third active pattern spaced apart at a second distance from the second active pattern, a first device isolation layer between the first and second active patterns, a second device isolation layer between the second and third active patterns, a first channel structure overlapping the first active pattern, a second channel structure overlapping the second active pattern, a third channel structure overlapping the third active pattern, and a separation dielectric layer between the first and second channel structures. The separation dielectric layer may overlap the first device isolation layer. A level of a top surface of the first device isolation layer may be higher than a level of a top surface of the second device isolation layer.