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    SEMICONDUCTOR DEVICE
    1.
    发明公开
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20240014284A1

    公开(公告)日：2024-01-11

    申请号：US18195657

    申请日：2023-05-10

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Seungmin SONG ,  Myungil KANG ,  Hyojin KIM ,  Doyoung CHOI

    IPC: H01L29/423 ,  H01L27/092 ,  H01L29/786 ,  H01L29/775 ,  H01L23/528 ,  H01L29/417 ,  H01L29/06

    CPC classification number: H01L29/42392 ,  H01L27/092 ,  H01L29/78696 ,  H01L29/775 ,  H01L23/5283 ,  H01L29/41775 ,  H01L29/0673

    Abstract: A semiconductor device includes an active region on a substrate; channel layers on the active region spaced apart from each other and including lower and upper channel layers; an intermediate insulating layer between an uppermost lower channel layer and a lowermost upper channel layer; a gate intersecting the active region and including a lower gate electrode surrounding the lower channel layers and an upper gate electrode surrounding the upper channel layers; an insulating pattern between the upper and lower gate electrodes on a side of the intermediate insulating layer; source/drain regions on at least one side of the gate, and including lower source/drain regions connected to the lower channel layers and upper source/drain regions connected to the upper channel layers; and a contact plug including a horizontal extension portion connected to the lower source/drain regions, and a vertical extension portion connected to the horizontal extension portion.

    THREE DIMENSIONAL SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    3.
    发明申请
    THREE DIMENSIONAL SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权

    公开(公告)号：US20250089314A1

    公开(公告)日：2025-03-13

    申请号：US18588089

    申请日：2024-02-27

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Donghoon HWANG ,  Hyojin KIM ,  Byungho MOON ,  Myungil KANG ,  Doyoung CHOI

    IPC: H01L29/06 ,  H01L27/092 ,  H01L29/417 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

    Abstract: A three-dimensional semiconductor device includes a first active region on a substrate, including a first active region on a substrate, including a lower channel pattern and lower source/drain patterns connected to the lower channel pattern, the lower channel pattern including a plurality of lower semiconductor patterns stacked and spaced apart from each other in a first direction that is perpendicular to an upper surface of the substrate, and the lower semiconductor patterns including a lowermost first semiconductor pattern, a second active region stacked on the first active region, including an upper channel pattern and an upper source/drain pattern connected to the upper channel pattern, a lower gate electrode on the lower channel pattern, and a lower insulating pattern under the first semiconductor pattern, the first semiconductor pattern spaced apart from the lower insulating pattern in the first direction. The lower gate electrode includes a first portion adjacent to a first sidewall of the lower insulating pattern and extending in the first direction from an upper surface to a bottom surface of the lower gate electrode, a second portion adjacent to a second sidewall of the lower insulating pattern and extending in the first direction from the upper surface to the bottom surface of the lower gate electrode, the second sidewall facing the first sidewall in a second direction which is perpendicular to the first direction, and a third portion in contact with a bottom surface of the lower insulating pattern and extending from the first portion to the second portion in the second direction.

    SEMICONDUCTOR DEVICE
    6.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20250126861A1

    公开(公告)日：2025-04-17

    申请号：US18745312

    申请日：2024-06-17

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Wooseok PARK ,  Donghoon HWANG ,  Myungil KANG ,  Wookhwan SONG ,  Doyoung CHOI

    IPC: H01L29/08 ,  H01L29/06 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

    Abstract: A semiconductor device includes: a substrate; an active region extending in a first direction on the substrate; a gate structure extending in a second direction on the active region and intersecting the active region; a source/drain region on the active region on a side of the gate structure; a separation pattern extending in the first direction and separating the gate structure; and a contact structure on the separation pattern and crossing the separation pattern, the contact structure being electrically connected to the source/drain region, wherein the contact structure includes a first portion and a second portion, the first portion contacts the separation pattern, the second portion contacts the source/drain region, a lower surface of the second portion is at a level lower than a lower surface of the first portion, and a lowermost end of the contact structure is spaced apart from the separation pattern.

    SEMICONDUCTOR DEVICE
    7.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20250072066A1

    公开(公告)日：2025-02-27

    申请号：US18412812

    申请日：2024-01-15

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Wooseok PARK ,  Wookhwan SONG ,  Donghoon HWANG ,  Myungil KANG ,  Taehyun RYU ,  Namhyun LEE

    IPC: H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

    Abstract: A semiconductor device may include a first active pattern, a second active pattern spaced apart at a first distance from the first active pattern, a third active pattern spaced apart at a second distance from the second active pattern, a first device isolation layer between the first and second active patterns, a second device isolation layer between the second and third active patterns, a first channel structure overlapping the first active pattern, a second channel structure overlapping the second active pattern, a third channel structure overlapping the third active pattern, and a separation dielectric layer between the first and second channel structures. The separation dielectric layer may overlap the first device isolation layer. A level of a top surface of the first device isolation layer may be higher than a level of a top surface of the second device isolation layer.

    SEMICONDUCTOR DEVICES
    8.
    发明申请
    SEMICONDUCTOR DEVICES 有权

    公开(公告)号：US20250031412A1

    公开(公告)日：2025-01-23

    申请号：US18677236

    申请日：2024-05-29

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hyojin KIM ,  Donghoon HWANG ,  Myungil KANG

    IPC: H01L29/417 ,  H01L23/528 ,  H01L29/06 ,  H01L29/40 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

    Abstract: A semiconductor device includes gate structures on an insulation structure, the gate structures disposed in a second direction substantially parallel to an upper surface of the insulation structure, source/drain layers at opposite sides, respectively, of each gate structure in a first direction intersecting the second direction, semiconductor patterns disposed in a third direction substantially perpendicular to the upper surface of the insulation structure, the semiconductor patterns extending through each of the gate structures and contacting the source/drain layers, a first division pattern between the gate structures, and a connection pattern extending into and contacting an upper portion of the first division pattern and upper portions of the gate structures adjacent to the first division pattern, a lower surface of the connection pattern being lower than upper surfaces of the gate structures and an upper surface of the connection pattern being higher than the upper surfaces of the gate structures.

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