公开(公告)号：US20250126861A1

公开(公告)日：2025-04-17

申请号：US18745312

申请日：2024-06-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Wooseok PARK ,  Donghoon HWANG ,  Myungil KANG ,  Wookhwan SONG ,  Doyoung CHOI

IPC: H01L29/08 ,  H01L29/06 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

Abstract: A semiconductor device includes: a substrate; an active region extending in a first direction on the substrate; a gate structure extending in a second direction on the active region and intersecting the active region; a source/drain region on the active region on a side of the gate structure; a separation pattern extending in the first direction and separating the gate structure; and a contact structure on the separation pattern and crossing the separation pattern, the contact structure being electrically connected to the source/drain region, wherein the contact structure includes a first portion and a second portion, the first portion contacts the separation pattern, the second portion contacts the source/drain region, a lower surface of the second portion is at a level lower than a lower surface of the first portion, and a lowermost end of the contact structure is spaced apart from the separation pattern.

公开(公告)号：US20250072066A1

公开(公告)日：2025-02-27

申请号：US18412812

申请日：2024-01-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Wooseok PARK ,  Wookhwan SONG ,  Donghoon HWANG ,  Myungil KANG ,  Taehyun RYU ,  Namhyun LEE

IPC: H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

Abstract: A semiconductor device may include a first active pattern, a second active pattern spaced apart at a first distance from the first active pattern, a third active pattern spaced apart at a second distance from the second active pattern, a first device isolation layer between the first and second active patterns, a second device isolation layer between the second and third active patterns, a first channel structure overlapping the first active pattern, a second channel structure overlapping the second active pattern, a third channel structure overlapping the third active pattern, and a separation dielectric layer between the first and second channel structures. The separation dielectric layer may overlap the first device isolation layer. A level of a top surface of the first device isolation layer may be higher than a level of a top surface of the second device isolation layer.

公开(公告)号：US20240379795A1

公开(公告)日：2024-11-14

申请号：US18504981

申请日：2023-11-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Wooseok PARK ,  Taehyun RYU ,  Namhyun LEE

IPC: H01L29/423 ,  H01L29/06 ,  H01L29/775 ,  H01L29/786

Abstract: A semiconductor device comprising: a substrate; a first lower pattern on the substrate; a second lower pattern on the first lower pattern; channel patterns on the second lower pattern; a first field insulating layer on a first side surface of the first lower pattern; a second field insulating layer on a second side surface of the first lower pattern; a buried insulating structure on the first field insulating layer and on side surfaces of the channel patterns; a protective layer on the second field insulating layer; source/drain patterns on sides of each of the channel patterns; and a gate electrode extending around the channel patterns and the buried insulating structure, wherein the protective layer comprises: a protective insulating layer between the first lower pattern and the second lower pattern, and between the gate electrode and the second field insulating layer; and a protective liner extending around the protective insulating layer.

公开(公告)号：US20240321875A1

公开(公告)日：2024-09-26

申请号：US18603591

申请日：2024-03-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Wooseok PARK ,  Jaeho Jeon ,  Donghoon Hwang ,  Taehyun Ryu ,  Namhyun Lee

IPC: H01L27/088 ,  H01L29/06 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L27/088 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/775 ,  H01L29/78696

Abstract: A semiconductor device includes a substrate, an active region protruding from an upper surface of the substrate and extending in a first horizontal direction, a plurality of nanosheet stacks on the active region, a plurality of gate lines extending in a second horizontal direction intersecting the first horizontal direction, on the active region, and surrounding the plurality of nanosheet stacks, and a first insulating pattern between two nanosheet stacks adjacent in the first horizontal direction among the plurality of nanosheet stacks, on the active region, and extending in a vertical direction perpendicular to the first horizontal direction and the second horizontal direction, wherein the first insulating pattern is in contact with the plurality of nanosheet stacks.

公开(公告)号：US20220157811A1

公开(公告)日：2022-05-19

申请号：US17380232

申请日：2021-07-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junggun YOU ,  Sung Gi HUR ,  Sungil PARK ,  Wooseok PARK ,  Seungmin SONG

IPC: H01L27/088 ,  H01L27/092 ,  H01L21/8238

Abstract: A semiconductor device including a substrate that includes first and second regions; a first active pattern on the first region, the first active pattern including first source/drain patterns and a first channel pattern between the first source/drain patterns; a second active pattern on the second region, the second active pattern including second source/drain patterns and a second channel pattern between the second source/drain patterns; and a first gate electrode on the first channel pattern and a second gate electrode on the second channel pattern, wherein a length of the first channel pattern is greater than a length of the second channel pattern, each of the first channel pattern and the second channel pattern includes a plurality of semiconductor patterns stacked on the substrate, and at least two semiconductor patterns of the first channel pattern are bent away from or toward a bottom surface of the substrate.