公开(公告)号：US20190131152A1

公开(公告)日：2019-05-02

申请号：US16012045

申请日：2018-06-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Du-Sik Bae ,  Hang-Ryong Lim ,  Se-Won Ko ,  Yoon-Mi Lee ,  Jin-Ho Kim ,  Jung-Dae Park ,  Min-Seon Lee ,  Yeong-Cheol Lee

IPC: H01L21/67 ,  H01L21/673

CPC classification number: H01L21/67253 ,  H01L21/67248 ,  H01L21/67353 ,  H01L21/67359 ,  H01L21/67393

Abstract: A substrate carrier may include a carrier body and a first sensor unit. The carrier body may include an internal space, an inlet port and an outlet port. The internal space may be configured to receive a substrate. A purge gas may be introduced into the internal space through the inlet port. A gas in the internal space may be exhausted through the outlet port. The first sensor unit may be at the outlet port and configured to detect environmental properties of the internal space in real time. Thus, a generation or cause of a contaminant in the carrier body may be accurately identified.

公开(公告)号：US20200161308A1

公开(公告)日：2020-05-21

申请号：US16749791

申请日：2020-01-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jin-A KIM ,  Yong-Kwan Kim ,  Se-Keun Park ,  Joo-Young Lee ,  Cha-Won Koh ,  Yeong-Cheol Lee

IPC: H01L27/108

Abstract: A semiconductor device and methods of manufacturing the same are provided. The semiconductor device includes a substrate, buried semiconductor layers, a word line, a bit line, buried contacts, and insulation spacers, and a charge storage. The substrate has active regions and field regions. The buried semiconductor layers are buried in the substrate at the active regions. The word line is buried in the substrate and crosses one of the active regions. The bit line is disposed in one of the active regions. The buried contacts are disposed on the active regions and the field regions. The insulation spacers are disposed on the substrate and on a sidewall of the buried contacts, respectively. The charge storage is disposed on one or more of the buried contacts. The buried semiconductor layers contact, respectively, one of the buried contacts and one of the insulation spacers.

公开(公告)号：US10586798B2

公开(公告)日：2020-03-10

申请号：US16170665

申请日：2018-10-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jin-A Kim ,  Yong-Kwan Kim ,  Se-Keun Park ,  Joo-Young Lee ,  Cha-Won Koh ,  Yeong-Cheol Lee

IPC: H01L27/108 ,  H01L21/768 ,  H01L21/3065 ,  H01L21/285

Abstract: A semiconductor device and methods of manufacturing the same are provided. The semiconductor device includes a substrate, word lines, a doped junction, bit line structures, and buried contacts. The substrate has active regions. The word lines extend across the active regions. The doped junction has impurities and is arranged at the active regions, and includes first junctions and second junctions, each first junction arranged at a central portion of one of the active regions and each second junction arranged at an end portion of another one of the active regions, a buried semiconductor layer being included in each second junction. The bit line structures contact with a respective one of the first junctions. The buried contacts are arranged in a matrix shape, each contacting with a respective one of the second junctions and the included buried semiconductor layer and simultaneously contacting with a charge storage for storing data.

公开(公告)号：US09543308B2

公开(公告)日：2017-01-10

申请号：US15009948

申请日：2016-01-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hoon Park ,  Young-Seok Kim ,  Yeong-Cheol Lee

IPC: H01L27/108 ,  H01L21/764

CPC classification number: H01L27/10805 ,  H01L21/76224 ,  H01L21/764 ,  H01L27/10814 ,  H01L27/10855 ,  H01L27/10873 ,  H01L27/10885 ,  H01L27/10888

Abstract: A semiconductor device includes a bit line structure on a substrate, the bit line structure having a polysilicon layer pattern doped with impurities, and a metal layer pattern on the polysilicon layer pattern, a first spacer surrounding and contacting a sidewall of the bit line structure, the first spacer having a constant thickness, and a capacitor contact structure on the substrate, an air gap being defined between the capacitor contact structure and the first spacer.

Abstract translation: 半导体器件包括衬底上的位线结构，位线结构具有掺杂杂质的多晶硅层图案，多晶硅层图案上的金属层图案，围绕并接触位线结构侧壁的第一间隔物， 所述第一间隔物具有恒定的厚度，以及所述衬底上的电容器接触结构，气隙限定在所述电容器接触结构和所述第一间隔物之间​​。

公开(公告)号：US09257437B2

公开(公告)日：2016-02-09

申请号：US14475687

申请日：2014-09-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hoon Park ,  Young-Seok Kim ,  Yeong-Cheol Lee

IPC: H01L27/108 ,  H01L21/764

CPC classification number: H01L27/10805 ,  H01L21/76224 ,  H01L21/764 ,  H01L27/10814 ,  H01L27/10855 ,  H01L27/10873 ,  H01L27/10885 ,  H01L27/10888

Abstract: A semiconductor device includes a bit line structure on a substrate, the bit line structure having a polysilicon layer pattern doped with impurities, and a metal layer pattern on the polysilicon layer pattern, a first spacer surrounding and contacting a sidewall of the bit line structure, the first spacer having a constant thickness, and a capacitor contact structure on the substrate, an air gap being defined between the capacitor contact structure and the first spacer.

Abstract translation: 半导体器件包括衬底上的位线结构，位线结构具有掺杂杂质的多晶硅层图案，多晶硅层图案上的金属层图案，围绕并接触位线结构侧壁的第一间隔物， 所述第一间隔物具有恒定的厚度，以及所述衬底上的电容器接触结构，气隙限定在所述电容器接触结构和所述第一间隔物之间​​。

公开(公告)号：US10797056B2

公开(公告)日：2020-10-06

申请号：US16749791

申请日：2020-01-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jin-A Kim ,  Yong-Kwan Kim ,  Se-Keun Park ,  Joo-Young Lee ,  Cha-Won Koh ,  Yeong-Cheol Lee

IPC: H01L27/108 ,  H01L21/768 ,  H01L21/285 ,  H01L21/3065

Abstract: A semiconductor device and methods of manufacturing the same are provided. The semiconductor device includes a substrate, buried semiconductor layers, a word line, a bit line, buried contacts, and insulation spacers, and a charge storage. The substrate has active regions and field regions. The buried semiconductor layers are buried in the substrate at the active regions. The word line is buried in the substrate and crosses one of the active regions. The bit line is disposed in one of the active regions. The buried contacts are disposed on the active regions and the field regions. The insulation spacers are disposed on the substrate and on a sidewall of the buried contacts, respectively. The charge storage is disposed on one or more of the buried contacts. The buried semiconductor layers contact, respectively, one of the buried contacts and one of the insulation spacers.

公开(公告)号：US10790176B2

公开(公告)日：2020-09-29

申请号：US16012045

申请日：2018-06-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Du-Sik Bae ,  Hang-Ryong Lim ,  Se-Won Ko ,  Yoon-Mi Lee ,  Jin-Ho Kim ,  Jung-Dae Park ,  Min-Seon Lee ,  Yeong-Cheol Lee

IPC: H01L21/67 ,  H01L21/673

Abstract: A substrate carrier may include a carrier body and a first sensor unit. The carrier body may include an internal space, an inlet port and an outlet port. The internal space may be configured to receive a substrate. A purge gas may be introduced into the internal space through the inlet port. A gas in the internal space may be exhausted through the outlet port. The first sensor unit may be at the outlet port and configured to detect environmental properties of the internal space in real time. Thus, a generation or cause of a contaminant in the carrier body may be accurately identified.