公开(公告)号：US11715525B2

公开(公告)日：2023-08-01

申请号：US17408921

申请日：2021-08-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jun-Ho Seo ,  Yong-Lae Kim ,  Haneol Jang ,  Hyukje Kwon ,  Sang-Wan Nam

IPC: G11C16/10 ,  G11C16/14 ,  G11C16/04 ,  G11C16/08 ,  G11C16/24 ,  G11C16/26 ,  G11C16/34 ,  H10B43/27

CPC classification number: G11C16/14 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/24 ,  G11C16/26 ,  G11C16/3445 ,  G11C16/10 ,  H10B43/27

Abstract: A nonvolatile memory device includes a memory block including a first structure formed on a substrate and a second structure formed on the first structure. An erase method of the nonvolatile memory device includes applying a word line erase voltage to first normal word lines of the first structure and second normal word lines of the second structure, and applying a junction word line erase voltage smaller than the word line erase voltage to at least one of a first junction word line of the first structure and a second junction word line of the second structure. The first junction word line is a word line adjacent to the second structure from among word lines of the first structure, and the second junction word line is a word line adjacent to the first structure from among word lines of the second structure.