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1.发明申请公开(公告)号：US20220318436A1
公开(公告)日：2022-10-06
申请号：US17847593
申请日：2022-06-23
发明人： Bohdan Karpinskyy , Yong-ki LEE , Ji-eun Park , Kyoung-moon Ahn , Yun-Hyeok Choi
摘要： An integrated circuit including: a plurality of physically unclonable function (PUF) cells each configured to generate a cell signal having a unique value; a selector configured to output a first signal obtained by not inverting a cell signal output by a PUF cell selected from the plurality of PUF cells and a second signal obtained by inverting the cell signal; and a key generator configured to generate a security key in response to the first signal or the second signal, wherein the selector includes a first conversion circuit configured to generate the first signal and a second conversion circuit having the same structure as the first conversion circuit and configured to generate the second signal.
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公开(公告)号：US20200159497A1
公开(公告)日：2020-05-21
申请号：US16541705
申请日：2019-08-15
发明人： Ji-eun PARK , Yong-ki LEE , Yun-hyeok CHOI , Bohdan KARPINSKYY
摘要： A random number generator including: a first ring oscillator including a first inverter chain, the first inverter chain including a plurality of serially connected first inverters, the first ring oscillator configured to output a first random signal generated at a first sub-node between two neighboring first inverters among the plurality of first inverters; a second ring oscillator including a second inverter chain, the second inverter chain including a plurality of serially connected second inverters, the second ring oscillator configured to output a second random signal generated at a second sub-node between two neighboring second inverters among the plurality of second inverters; and a signal processing circuit for generating a random number by combining the first random signal with the second random signal.
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公开(公告)号：US20190068190A1
公开(公告)日：2019-02-28
申请号：US16004517
申请日：2018-06-11
发明人： Bohdan KARPINSKYY , Dae-hyeon KIM , Mi-jung NOH , Sang-wook PARK , Yong-ki LEE , Yun-hyeok CHOI
IPC分类号： H03K19/003 , H04L9/08 , H01L23/00
CPC分类号： H03K19/003 , G06F7/588 , H01L23/576 , H04L9/0866 , H04L9/0869 , H04L9/3278
摘要： An integrated circuit for a physically unclonable function (PUF) includes first and second PUF cells and a combination circuit. The first and second PUF cells respectively output first and second cell signals having unique levels based on a threshold level of a logic gate. The combination circuit includes a first stage that generates a first combination signal based on the first and second cell signals. The first and second PUF cells respectively include first and second logic gates to respectively output the first and second cell signals. The combination circuit includes a third logic gate that receives the first and second cell signals and outputs the first combination signal. The third logic gate has a same structure as each of the first and second logic gates.
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公开(公告)号：US20180136907A1
公开(公告)日：2018-05-17
申请号：US15404826
申请日：2017-01-12
发明人： Karpinskyy BOHDAN , Yong-ki LEE , Mi-jung NOH , Sang-wook PARK , Ki-tak KIM , Yong-Soo KIM , Yun-hyeok CHOI
IPC分类号： G06F7/58
摘要： An apparatus for testing a random number generator includes a correlation test circuit and a randomness determination circuit. The correlation test circuit extracts a first plurality of bit pairs each including two bits spaced apart from each other by a first distance in a bit stream generated by the random number generator, obtains a first sum of differences between respective two bits of the first plurality of bit pairs, and obtains a second sum of differences between respective two bits of a second plurality of bit pairs, the second plurality of bit pairs each including two bits spaced apart from each other by a second distance, different from the first distance, in the bit stream. The randomness determination circuit determines a randomness of the bit stream, based on the first sum and the second sum.
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