公开(公告)号：US20240071771A1

公开(公告)日：2024-02-29

申请号：US18355520

申请日：2023-07-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngwoo KIM ,  Yonghan PARK ,  Jiho PARK ,  Geumjung SEONG ,  Seunguk HAN

IPC: H01L21/311 ,  H01L21/308

CPC classification number: H01L21/31144 ,  H01L21/3086

Abstract: A method of manufacturing an integrated circuit device includes preparing a semiconductor substrate having an active area and a field area, sequentially forming a lower insulation layer, a buried layer, a first sacrificial layer, a second sacrificial layer, and a third sacrificial layer on the semiconductor substrate, removing a portion of the third sacrificial layer to form a first sacrificial pattern, removing a portion of the second sacrificial layer and the first sacrificial pattern to form a second sacrificial pattern, removing a portion of the first sacrificial layer and the second sacrificial pattern to form a third sacrificial pattern, removing a portion of the buried layer and the third sacrificial pattern to form a buried pattern, and removing a portion of the lower insulation layer and a portion of the semiconductor substrate by using the buried pattern as an etch mask to form a word line trench.