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    SEMICONDUCTOR DEVICES
    1.
    发明申请
    SEMICONDUCTOR DEVICES 有权

    公开(公告)号：US20220406713A1

    公开(公告)日：2022-12-22

    申请号：US17713705

    申请日：2022-04-05

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Junyoung CHOI ,  Youngwoo KIM ,  Taehoon KIM ,  Sangyeon HAN

    IPC: H01L23/528 ,  H01L27/108 ,  H01L23/532

    Abstract: A semiconductor device includes a substrate including a cell region and a peripheral circuit region; a conductive structure on the cell region and the peripheral circuit region, the conductive structure extending in a first direction parallel to an upper surface of the substrate; a gate structure on the peripheral circuit region, the gate structure spaced apart from the conductive structure in the first direction; a spacer contacting a sidewall of the gate structure; and a first capping pattern contacting a sidewall of an end portion in the first direction of the conductive structure and a sidewall of the spacer, wherein the spacer and the first capping pattern include different insulating materials.

    METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE
    3.
    发明公开
    METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE 审中-公开

    公开(公告)号：US20240071771A1

    公开(公告)日：2024-02-29

    申请号：US18355520

    申请日：2023-07-20

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Youngwoo KIM ,  Yonghan PARK ,  Jiho PARK ,  Geumjung SEONG ,  Seunguk HAN

    IPC: H01L21/311 ,  H01L21/308

    CPC classification number: H01L21/31144 ,  H01L21/3086

    Abstract: A method of manufacturing an integrated circuit device includes preparing a semiconductor substrate having an active area and a field area, sequentially forming a lower insulation layer, a buried layer, a first sacrificial layer, a second sacrificial layer, and a third sacrificial layer on the semiconductor substrate, removing a portion of the third sacrificial layer to form a first sacrificial pattern, removing a portion of the second sacrificial layer and the first sacrificial pattern to form a second sacrificial pattern, removing a portion of the first sacrificial layer and the second sacrificial pattern to form a third sacrificial pattern, removing a portion of the buried layer and the third sacrificial pattern to form a buried pattern, and removing a portion of the lower insulation layer and a portion of the semiconductor substrate by using the buried pattern as an etch mask to form a word line trench.

    SEMICONDUCTOR DEVICE
    4.
    发明公开
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20240023325A1

    公开(公告)日：2024-01-18

    申请号：US18200248

    申请日：2023-05-22

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Youngwoo KIM

    IPC: H10B12/00 ,  H01L29/06

    CPC classification number: H10B12/50 ,  H01L29/0649 ,  H10B12/482

    Abstract: A semiconductor device includes a substrate having a cell array region, a peripheral circuit region, and a connection region between the cell array region and the peripheral circuit region; a device isolation region defining a cell active region on the cell array region, a peripheral active region on the peripheral circuit region, and a dummy active region on the connection region; and a gate structure including a gate electrode extending into the device isolation region on the connection region across the cell active region on the cell array region, wherein the dummy active region is adjacent to the cell active region, and wherein an upper surface of the dummy active region vertically overlapping the gate structure is positioned on a level lower than a level of an upper surface of the cell active region vertically overlapping the gate structure.

    3D SEMICONDUCTOR MEMORY DEVICE
    6.
    发明公开
    3D SEMICONDUCTOR MEMORY DEVICE 审中-公开

    公开(公告)号：US20230371262A1

    公开(公告)日：2023-11-16

    申请号：US18358993

    申请日：2023-07-26

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Dawoon JEONG ,  Youngwoo KIM ,  Jaesung KIM ,  Hyoungryeol IN

    IPC: H01L29/66

    CPC classification number: H10B43/50 ,  H10B43/27 ,  H10B43/10

    Abstract: A semiconductor device includes a substrate having a first region and a second region, gate electrodes stacked and spaced apart from each other in a first direction, perpendicular to an upper surface of the substrate in the first region and extending in different lengths along a second direction, perpendicular to the first direction in the second region, first separation regions penetrating the gate electrodes in the first and second regions, extending in the second direction, and spaced apart from each other in a third direction, perpendicular to the first and second directions, second separation regions penetrating the gate electrodes in the second region and spaced apart from each other in the second direction between the separation regions, and a first vertical structure penetrating the gate electrodes in the second region and closest to the first region, wherein a width of the second separation regions in the third direction is greater than a width of the first vertical structure, a first end point of the second separation regions adjacent to the first region is spaced apart from a central axis of the first dummy structure in the second direction, away from the first region.

    SEMICONDUCTOR DEVICE
    8.
    发明公开
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20240130110A1

    公开(公告)日：2024-04-18

    申请号：US18370905

    申请日：2023-09-21

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Youngwoo KIM

    IPC: H10B12/00

    CPC classification number: H10B12/34 ,  H10B12/053 ,  H10B12/315 ,  H10B12/488

    Abstract: A semiconductor device includes a substrate, an isolation layer defining an active region in the substrate, a word line extending in a first horizontal direction in a first area of the substrate, a bit line extending in a second horizontal direction perpendicular to the first horizontal direction, on the substrate, and a plurality of first dummy word lines provided in a second area of the substrate adjacent in the second horizontal direction to a first end portion of the first area in the first horizontal direction, the plurality of first dummy word lines extending in the first horizontal direction, wherein a length of each of the plurality of first dummy word lines in the first horizontal direction is less than a length of the word line in the first horizontal direction.

    SEMICONDUCTOR DEVICE
    9.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20210305270A1

    公开(公告)日：2021-09-30

    申请号：US17085715

    申请日：2020-10-30

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Dawoon JEONG ,  Youngwoo KIM ,  Jaesung KIM ,  Hyoungryeol IN

    IPC: H01L27/11575 ,  H01L27/11582 ,  H01L27/11556 ,  H01L27/11548

    Abstract: A semiconductor device includes a substrate having a first region and a second region, gate electrodes stacked and spaced apart from each other in a first direction, perpendicular to an upper surface of the substrate in the first region and extending in different lengths along a second direction, perpendicular to the first direction in the second region, first separation regions penetrating the gate electrodes in the first and second regions, extending in the second direction, and spaced apart from each other in a third direction, perpendicular to the first and second directions, second separation regions penetrating the gate electrodes in the second region and spaced apart from each other in the second direction between the separation regions, and a first vertical structure penetrating the gate electrodes in the second region and closest to the first region, wherein a width of the second separation regions in the third direction is greater than a width of the first vertical structure, a first end point of the second separation regions adjacent to the first region is spaced apart from a central axis of the first dummy structure in the second direction, away from the first region.

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