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    SUBSTRATE SUPPORTER
    1.
    发明公开
    SUBSTRATE SUPPORTER 审中-公开

    公开(公告)号：US20240321619A1

    公开(公告)日：2024-09-26

    申请号：US18439492

    申请日：2024-02-12

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Yunjae Lee ,  Jun Hyung Kim ,  Sangyeon Oh ,  Jihyeong Lee ,  Yonjoo Kang ,  Youngil Kang ,  Minsung Kim ,  Inhwan Park

    IPC: H01L21/683 ,  H01L21/02 ,  H01L21/67

    CPC classification number: H01L21/6833 ,  H01L21/67288 ,  H01L21/02271

    Abstract: The present disclosure relates to substrate supporters and substrate processing apparatuses. An example substrate supporter includes an upper surface on which a substrate is loaded, a base, an outer dam extending along an edge of the base, a contact band connected with the outer dam, extending along the circumferential direction of the base, and onto which the substrate is loaded, and a first contact pattern disposed adjacent to the contact band and extending into an inside of the contact band, the first contact pattern extending along the circumferential direction of the base, where an area of the first contact pattern is larger than an area where the contact band overlaps with the substrate.

    METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES
    2.
    发明公开
    METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES 审中-公开

    公开(公告)号：US20240049445A1

    公开(公告)日：2024-02-08

    申请号：US18355429

    申请日：2023-07-20

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hoju Song ,  Eunjung Kim ,  Kihyung Nam ,  Jaehyung Park ,  Yunjae Lee

    IPC: H10B12/00

    CPC classification number: H10B12/09 ,  H10B12/315 ,  H10B12/50

    Abstract: A method of manufacturing a semiconductor device may include forming word lines in word line trenches on a substrate, removing a portion of the substrate located between a pair of the word lines to form a direct contact hole, forming on an inner wall of the direct contact hole a sacrificial liner structure that includes a first liner, a sacrificial layer, and a second liner, forming a preliminary direct contact in the direct contact hole, removing the sacrificial layer, while leaving the first and second liners, to form an air space between the first and second liners, forming a bit line stack that covers an upper surface the air space on the preliminary direct contact, patterning the bit line stack to form bit lines, and removing side portions of the second liner and the preliminary direct contact in the direct contact hole to form a direct contact.

    SUBSTRATE SUPPORT DEVICE
    6.
    发明公开
    SUBSTRATE SUPPORT DEVICE 审中-公开

    公开(公告)号：US20240318314A1

    公开(公告)日：2024-09-26

    申请号：US18609067

    申请日：2024-03-19

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Yonjoo KANG ,  Yunjae Lee ,  Junhyung Kim ,  Youngbok Lee ,  Sangchul Han ,  Minsung Kim ,  Inhwan Park ,  Sangyeon Oh

    IPC: C23C16/458 ,  C23C16/46

    CPC classification number: C23C16/4586 ,  C23C16/46

    Abstract: A substrate support device includes a chuck plate, a shaft connected to a center lower end of the chuck plate, a heater unit provided inside the chuck plate, an electrode unit provided inside the chuck plate, and provided on the heater unit, a jumper unit provided inside the chuck plate, arranged between the electrode unit and the heater unit, and electrically connected to the electrode unit to supply power to the electrode unit, and a power control unit, wherein the electrode unit includes a center electrode and a first electrode arranged in a ring shape around the center electrode, wherein the jumper unit includes a first jumper connected to the first electrode and a center jumper connected to the center electrode, and wherein the first jumper includes a first connection jumper, and a first inclined jumper electrically connecting the first jumper.

    SEMICONDUCTOR DEVICES
    7.
    发明公开
    SEMICONDUCTOR DEVICES 审中-公开

    公开(公告)号：US20240081045A1

    公开(公告)日：2024-03-07

    申请号：US18140004

    申请日：2023-04-27

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jaehyung Park ,  Hoju Song ,  Eunjung Kim ,  Kihyung Nam ,  Yunjae Lee

    IPC: H10B12/00

    CPC classification number: H10B12/482 ,  H10B12/315

    Abstract: A semiconductor device includes a substrate including a first region and a second region, a bit line structure that extends over the first region and the second region, an upper spacer structure on a first sidewall of the bit line structure on the first region of the substrate, and an insulation spacer structure on the first sidewall of the bit line structure on the second region of the bit line structure. The upper spacer structure may include first, second and third upper spacers sequentially stacked on the sidewall of the bit line structure in a first horizontal direction. The insulation spacer structure may include first, second, third and fourth insulation spacers sequentially stacked on the sidewall of the bit line structure in the first horizontal direction. The first, second and third insulation spacers include substantially the same materials as the first, second and third upper spacers, respectively.

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