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公开(公告)号:US10546647B2
公开(公告)日:2020-01-28
申请号:US15633747
申请日:2017-06-26
Applicant: SanDisk Technologies LLC
Inventor: Deep Saxena , Saurabh Kumar Singh
Abstract: An oscillator circuit includes a voltage controlled oscillator (VCO) configured to generate a clock signal having a clock period that is adjustable based on a control signal. The oscillator circuit includes a time to voltage converter configured to receive the clock signal and generate a compensation voltage potential that is proportional to the clock period and a zero temperature coefficient (ZTC) current. The oscillator circuit includes an amplifier configured to generate the control signal responsive to the compensation voltage potential and a temperature independent reference voltage potential. A method includes applying a control signal to a VCO, generating a clock signal having a clock period responsive to the control signal, generating a compensation voltage potential, and adjusting the clock period using the compensation voltage potential. A memory device includes the oscillator circuit.
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公开(公告)号:US20180374544A1
公开(公告)日:2018-12-27
申请号:US15633747
申请日:2017-06-26
Applicant: SanDisk Technologies LLC
Inventor: Deep Saxena , Saurabh Kumar Singh
CPC classification number: G11C16/32 , G06F1/04 , G11C5/145 , G11C7/222 , G11C16/26 , G11C16/30 , H03B5/04 , H03L1/02 , H03L1/022 , H03L1/026
Abstract: An oscillator circuit includes a voltage controlled oscillator (VCO) configured to generate a clock signal having a clock period that is adjustable based on a control signal. The oscillator circuit includes a time to voltage converter configured to receive the clock signal and generate a compensation voltage potential that is proportional to the clock period and a zero temperature coefficient (ZTC) current. The oscillator circuit includes an amplifier configured to generate the control signal responsive to the compensation voltage potential and a temperature independent reference voltage potential. A method includes applying a control signal to a VCO, generating a clock signal having a clock period responsive to the control signal, generating a compensation voltage potential, and adjusting the clock period using the compensation voltage potential. A memory device includes the oscillator circuit.
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