公开(公告)号：US5254867A

公开(公告)日：1993-10-19

申请号：US726764

申请日：1991-07-08

申请人： Sanae Fukuda ,  Naoyuki Shigyo

发明人： Sanae Fukuda ,  Naoyuki Shigyo

IPC分类号： H01L21/28 ,  H01L29/423 ,  H01L29/51 ,  H01L29/78 ,  H01L29/06

CPC分类号： H01L21/28194 ,  H01L21/28202 ,  H01L21/28211 ,  H01L29/4232 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/78

摘要： A MOSFET comprises a silicon substrate 1 having a source/drain region 7b formed in a surface region thereof, an insulating film 3 formed of silicon oxide, and a gate electrode 4a. The side surface region of the electrode 4a is covered with an insulating film 6 formed of silicon nitride. The insulating film 6 has an extended portion interposed between the electrode 4a and the insulating film 3 in a manner to surround the lower corner portion 4b of the electrode. Since the insulating film 6 has a dielectric constant larger than that of the insulating film 3, it is possible to suppress the electric field intensity at the lower corner portion 4b of the electrode.

摘要翻译： MOSFET包括在其表面区域中形成有源极/漏极区域7b的硅衬底1，由氧化硅形成的绝缘膜3和栅极电极4a。 电极4a的侧面区域由氮化硅形成的绝缘膜6覆盖。 绝缘膜6具有以包围电极的下角部4b的方式介于电极4a和绝缘膜3之间的延伸部分。 由于绝缘膜6的介电常数大于绝缘膜3的介电常数，因此能够抑制电极的下角部4b的电场强度。

公开(公告)号：US5097311A

公开(公告)日：1992-03-17

申请号：US375772

申请日：1989-07-05

申请人： Masao Iwase ,  Sanae Fukuda ,  Makoto Yoshimi

发明人： Masao Iwase ,  Sanae Fukuda ,  Makoto Yoshimi

IPC分类号： H01L21/8234 ,  H01L21/8238 ,  H01L27/088 ,  H01L27/092 ,  H01L29/78 ,  H01L29/786

CPC分类号： H01L27/092

摘要： A CMOS inverter circuit incorporating a P channel MOSFET and an N channel MOSFET, both of which can achieve surface conduction, is provided while maintaining the prescribed miniaturization. Thus, the threshold value and conductance of the both MOSFETs are independent of the thickness of the silicon film, and can be easily controlled in the manufacturing processes thereof.

摘要翻译： 在保持规定的小型化的同时，提供并入有P沟道MOSFET和N沟道MOSFET的CMOS逆变器电路，两者均可实现表面导通。 因此，两个MOSFET的阈值和电导与硅膜的厚度无关，并且在其制造工艺中可以容易地控制。

公开(公告)号：US6099574A

公开(公告)日：2000-08-08

申请号：US991406

申请日：1997-12-16

申请人： Sanae Fukuda ,  Hirotaka Amakawa ,  Takahisa Kanemura

发明人： Sanae Fukuda ,  Hirotaka Amakawa ,  Takahisa Kanemura

IPC分类号： H01L29/00 ,  G06F17/50 ,  H01L21/00 ,  H01L21/02 ,  H01L21/265 ,  G06F9/455

CPC分类号： G06F17/5018

摘要： Process simulation for LSIs and other semiconductor devices will handle plural same impurities introduced in different processes as different impurities. Thus, by handling them as different impurities in calculation, it is possible to obtain the distribution profiles of impurities in semiconductor devices without being effected by another same impurity introduced in another process or a number of processes during processing. With this, even a plurality of process conditions are discussed or when one or some of process(es) in a sequence of semiconductor device fabrication processes is (are) changed in procedure, it is not necessary to repeat the process simulation many times from the beginning. And it is possible to easily decide which process must be changed in conditions based on a finally obtained structure of semiconductor devices. The process simulation results are used directly as input to device simulation, to rapidly obtain performance of semiconductor devices such as current vs voltage characteristics. Therefore, the efficiency of calculations required to obtain the optimal conditions for semiconductor structures can be improved, thus shortening the lapse of time for designing and development of semiconductor devices.

摘要翻译： LSI和其他半导体器件的工艺仿真将处理作为不同杂质在不同工艺中引入的多种相同的杂质。 因此，通过在计算中将它们处理为不同的杂质，可以获得半导体器件中的杂质的分布特征，而不受另一过程中引入的另一相同杂质的影响或处理过程中的多个工艺的影响。 因此，甚至讨论了多个工艺条件，或者当半导体器件制造工艺的序列中的一个或一些工艺在过程中被改变时，不需要从 开始。 并且可以容易地确定在基于最终获得的半导体器件的结构的条件下必须改变哪个工艺。 过程仿真结果直接用作器件仿真的输入，以快速获得半导体器件的性能，如电流与电压特性。 因此，可以提高获得半导体结构的最佳条件所需的计算效率，从而缩短半导体器件的设计和开发时间的流逝。